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TI SN74LVC1G86DCKRRoHS

Manufacturer
TI
MPN
SN74LVC1G86DCKR
LCSC Part #
C52350
Packaging
SC-70-5
Customer #
Key Attributes
Single 2-Input Exclusive-OR Gate
Datasheetpdf iconTI SN74LVC1G86DCKR
In-Stock: 136,580
136,580 In stock, ships now
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QtyUnit PriceTotal Amount
10+$ 0.0664$ 0.66
100+$ 0.0525$ 5.25
300+$ 0.0455$ 13.65
3,000+$ 0.0379$ 113.70
6,000+$ 0.0337$ 202.20
9,000+$ 0.0316$ 284.40
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingSC-70-5
Logic Family74LVC Series
Voltage - Supply1.65V~5.5V
Output Logic Level - Low100mV;450mV;300mV;400mV;550mV
Propagation Delay4ns@5V,50pF
FeaturesLive insertion protection;Local shutdown mode;Rear drive protection
Input Logic Level - Low700mV~800mV
Input Logic Level - High1.7V~2V
Operating Temperature-40℃~+125℃
Output Logic Level - High1.2V;1.9V;2.4V;2.3V;3.8V
Quiescent Current(Iq)10uA
Number of Channels1;2
Current - Output High(IOH)32mA
Current - Output Low(IOL)32mA
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Additional Information

TypeDetails
Minimum10
Multiple10
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

This single 2- input exclusive- OR gate is designed for 1.65- V to 5.5- V VCC operation. The SN74LVC1G86 device performs the Boolean function Y = A x B or Y = AB(overline) + AB in positive logic. A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial- power- down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

AI Translation
  • Available in the Texas Instruments NanoFree Package
  • Supports 5- V Vcc Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to Vcc
  • Max tpd of 4 ns at 3.3V
  • Low Power Consumption, 10- A Max Icc
  • ±24 - mA Output Drive at 3.3V
  • Ioff Supports Live Insertion, Partial- PowerDown Mode, and Back- Drive Protection
  • Latch- Up Performance Exceeds 100 mA Per JESD 78,Class II
  • ESD Protection Exceeds JESD 22 2000- V Human- Body Model (A114- A)
  • 200- V Machine Model (A115- A)
  • 1000- V Charged- Device Model (C101)