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TI CD4073BF3A
| Manufacturer | |
| MPN | CD4073BF3A |
| LCSC Part # | C5217200 |
| Packaging | CDIP(J)-14 |
| Customer # | |
| Key Attributes | 5uA 3V~18V 60ns@10V CDIP(J)-14 Gates and Inverters |
| Datasheet | TI CD4073BF3A |
| Alternative Parts | 3 |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | CDIP(J)-14 | |
| Features | - | |
| Logic Family | CD4 | |
| Operating Temperature | -55℃~+125℃ | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V | |
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Voltage - Supply | 3V~18V | |
| Current - Output High(IOH) | - | |
| Number of Channels | 3;3 | |
| Output Logic Level - Low | 50mV | |
| Propagation Delay | 60ns@10V | |
| Current - Output Low(IOL) | 6.8mA |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | CDIP(J)-14 | |
| Features | - | |
| Logic Family | CD4 | |
| Operating Temperature | -55℃~+125℃ | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V |
| Type | Description | |
|---|---|---|
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Voltage - Supply | 3V~18V | |
| Current - Output High(IOH) | - | |
| Number of Channels | 3;3 | |
| Output Logic Level - Low | 50mV | |
| Propagation Delay | 60ns@10V | |
| Current - Output Low(IOL) | 6.8mA |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
CD4073B, CD4081B and CD. 4082B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Features
AI Translation
- Medium-Speed Operation -- tpLH· tpHL = 80 ns (typ.) at VDD = 10 V
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Dtscription of 'B' Series CMOs Devices"
In-Stock: 3
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| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 41.2189 | $ 41.22 |
| 25+ | $ 39.2273 | $ 980.68 |
Standard Packaging25/Full Tube | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | CDIP(J)-14 | |
| Features | - | |
| Logic Family | CD4 | |
| Operating Temperature | -55℃~+125℃ | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V | |
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Voltage - Supply | 3V~18V | |
| Current - Output High(IOH) | - | |
| Number of Channels | 3;3 | |
| Output Logic Level - Low | 50mV | |
| Propagation Delay | 60ns@10V | |
| Current - Output Low(IOL) | 6.8mA |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Gates and Inverters | |
| Manufacturer | TI | |
| Packaging | CDIP(J)-14 | |
| Features | - | |
| Logic Family | CD4 | |
| Operating Temperature | -55℃~+125℃ | |
| Input Logic Level - High | 3.5V;7V;11V | |
| Input Logic Level - Low | 1.5V;3V;4V |
| Type | Description | |
|---|---|---|
| Output Logic Level - High | 4.95V;9.95V;14.95V | |
| Quiescent Current(Iq) | 5uA | |
| Voltage - Supply | 3V~18V | |
| Current - Output High(IOH) | - | |
| Number of Channels | 3;3 | |
| Output Logic Level - Low | 50mV | |
| Propagation Delay | 60ns@10V | |
| Current - Output Low(IOL) | 6.8mA |
Help & FeedbackShow similar products (0) >
Introduction
AI Translation
CD4073B, CD4081B and CD. 4082B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates.
Features
AI Translation
- Medium-Speed Operation -- tpLH· tpHL = 80 ns (typ.) at VDD = 10 V
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
- Standardized, symmetrical output characteristics
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Dtscription of 'B' Series CMOs Devices"
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
Alternative Parts
| MPN | Manufacturer | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|
| CD4073BF | TI | CDIP-14 | 5 | $ 17.1814 | ||
| 7705102CA | TI | CDIP-14 | 0 | $ 14.9536 | ||
| CD4073BEE4 | TI | PDIP-14 | 0 | $ 0.8724 |