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MDD(Microdiode Semiconductor) 74LVC2G04GW product image
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MDD(Microdiode Semiconductor) 74LVC2G04GWRoHS

Manufacturer
MDD(Microdiode Semiconductor)Asian Brands
MPN
74LVC2G04GW
LCSC Part #
C52140491
Packaging
SOT-363
Customer #
Key Attributes
Schmitt trigger 1.65V~5.5V 2ns@5.5V,50pF 2 4uA 2 SOT-363 Gates and Inverters RoHS
Datasheetpdf iconMDD(Microdiode Semiconductor) 74LVC2G04GW
In-Stock: 4,851
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QtyUnit PriceTotal Amount
1+$ 0.1288$ 0.13
10+$ 0.1025$ 1.03
30+$ 0.0893$ 2.68
100+$ 0.0795$ 7.95
500+$ 0.0715$ 35.75
1,000+$ 0.0676$ 67.60
Standard Packaging3000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerMDD(Microdiode Semiconductor)
PackagingSOT-363
Input TypeSchmitt trigger
Logic Family74LVC
Voltage - Supply1.65V~5.5V
Propagation Delay2ns@5.5V,50pF
Output Logic Level - Low800mV
FeaturesPower shutdown protection;Noise suppression function
Input Logic Level - Low700mV;800mV
Input Logic Level - High1.7V~2V
Operating Temperature-40℃~+125℃
Number of Circuits2
Output Logic Level - High2V
Quiescent Current(Iq)4uA
Number of Channels2
Current - Output High(IOH)32mA
Current - Output Low(IOL)32mA
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The 74LVC2G04 is a dual inverter. Its inputs can be driven by 3.3V or 5V devices. This feature allows the device to be used as a level translator in mixed 3.3V and 5V environments. All inputs incorporate Schmitt-trigger action, making the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the outputs, preventing damaging backflow current when the device is powered down.

Features

AI Translation
  • Wide supply voltage range: 1.65V to 5.5V
  • Input overvoltage tolerance up to 5.5V
  • High noise immunity
  • Output drive capability ±24 mA (VCC = 3.0 V)
  • CMOS low power consumption
  • Direct TTL-level interface capability
  • IOFF circuit for partial power-down mode operation
  • Latch-up performance exceeds 100 mA
  • JEDEC compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.6 V to 5.5 V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V; MM JESD22-A115C Class C exceeds 550 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options