ADI ADCLK950BCPZ-REEL7
| Manufacturer | |
| MPN | ADCLK950BCPZ-REEL7 |
| LCSC Part # | C514320 |
| Packaging | LFCSP-40(6x6) |
| Customer # | |
| Key Attributes | Two Selectable Inputs, 10 LVPECL Outputs, SiGe Clock Fanout Buffer |
| Datasheet | ADI ADCLK950BCPZ-REEL7 |
| RoHS Compliance | 1 documents available |
| Alternative Parts | 1 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | ADI | |
| Packaging | LFCSP-40(6x6) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.97V~3.63V | |
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 4.8GHz | |
| Number of outputs | 10 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | ADI | |
| Packaging | LFCSP-40(6x6) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.97V~3.63V |
| Type | Description | |
|---|---|---|
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 4.8GHz | |
| Number of outputs | 10 |
Introduction
The ADCLK950 is an ultrafast clock fanout buffer fabricated on the proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter. The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFX pin is available for biasing ac-coupled inputs. The ADCLK950 features 10 full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply. The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC - 2 V for a total differential output swing of 1.6 V. The ADCLK950 is available in a 40-lead LFCSP and specified for operation over the standard industrial temperature range of -40°C to +85°C.
Features
- 2 selectable differential inputs
- 4.8 GHz operating frequency
- 75 fs rms broadband random jitter
- On-chip input terminations
- 3.3 V power supply
Applications
- Low jitter clock distribution
- Clock and data signal restoration
- Level translation
- Wireless communications
- Wired communications
- Medical and industrial imaging
- ATE and high performance instrumentation
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | ADI | |
| Packaging | LFCSP-40(6x6) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.97V~3.63V | |
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 4.8GHz | |
| Number of outputs | 10 |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Clock/Timing/Clock Buffers, Drivers | |
| Manufacturer | ADI | |
| Packaging | LFCSP-40(6x6) | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 2.97V~3.63V |
| Type | Description | |
|---|---|---|
| Features | Multi-channel fan-out/isolation drive;Internal termination and bias network | |
| Number of Inputs | 2 | |
| Output Frequency(Max) | 4.8GHz | |
| Number of outputs | 10 |
Introduction
The ADCLK950 is an ultrafast clock fanout buffer fabricated on the proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter. The device has two selectable differential inputs via the IN_SEL control pin. Both inputs are equipped with center tapped, differential, 100 Ω on-chip termination resistors. The inputs accept dc-coupled LVPECL, CML, 3.3 V CMOS (single-ended), and ac-coupled 1.8 V CMOS, LVDS, and LVPECL inputs. A VREFX pin is available for biasing ac-coupled inputs. The ADCLK950 features 10 full-swing emitter coupled logic (ECL) output drivers. For LVPECL (positive ECL) operation, bias VCC to the positive supply and VEE to ground. For ECL operation, bias VCC to ground and VEE to the negative supply. The output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC - 2 V for a total differential output swing of 1.6 V. The ADCLK950 is available in a 40-lead LFCSP and specified for operation over the standard industrial temperature range of -40°C to +85°C.
Features
- 2 selectable differential inputs
- 4.8 GHz operating frequency
- 75 fs rms broadband random jitter
- On-chip input terminations
- 3.3 V power supply
Applications
- Low jitter clock distribution
- Clock and data signal restoration
- Level translation
- Wireless communications
- Wired communications
- Medical and industrial imaging
- ATE and high performance instrumentation
C514320 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



