ADI AD1846JP

The Parallel-Port AD1846 SoundPort Stereo Codec integrates key audio data conversion and control functions into a single integrated circuit. The AD1846 is intended to provide a complete, single-chip audio solution for business audio and multimedia applications requiring operation from a single +5 V supply. It provides a direct, byte-wide interface to both ISA (“AT”) and EISA computer buses for simplified implementation on a computer motherboard or add-in card. The AD1846 generates enable and direction controls for IC buffers such as the 74_245. The AD1846 SoundPort Stereo Codec supports a DMA request/grant architecture for transferring data with the host computer bus. One or two DMA channels can be supported. Programmed I/O (PIO) mode is also supported for control register accesses and for applications lacking DMA control. Two input control lines support mixed direct and indirect addressing of twenty-one internal control registers over this asynchronous interface. External circuit requirements are limited to a minimal number of low cost support components. Anti-imaging DAC output filters are incorporated on-chip. DAC dynamic range exceeds 80 dB over the 20 audio band. Sample rates from 5.5 kHz to 48 kHz are supported from external crystals. The Codec includes a stereo pair of ∑∆ analog-to-digital converters and a stereo pair of ∑∆ digital-to-analog converters. Inputs to the ADC can be selected from four stereo pairs of analog signals: line, microphone (“mic”), auxiliary (“aux”) line #1, and post-mixed DAC output. A software-controlled programmable gain stage allows independent gain for each channel going into the ADC. The ADCs’ output can be digitally mixed with the DACs’ input. The pair of 16-bit outputs from the ADCs is available over a byte-wide bidirectional interface that also supports 16-bit digital input to the DACs and control information. The AD1846 can accept and generate 16-bit twos-complement PCM linear digital data, 8-bit unsigned magnitude PCM linear data, and 8-bit μ -law or A-law companded digital data. The Σ∆ DACs are preceded by a digital interpolation filter. An attenuator provides independent user volume control over each DAC channel. Nyquist images and shaped quantization noise are removed from the DACs’ analog stereo output by on-chip switched-capacitor and continuous-time filters. Two stereo pairs of auxiliary line-level inputs can also be mixed in the analog domain with the DAC output. The AD1846 SoundPort Stereo Codec accepts stereo line-level and mic-level inputs. LINE, MIC, and AUX1 inputs and postmixed DAC output analog stereo signals are multiplexed to the internal programmable gain amplifier (PGA) stage. The PGA following the input multiplexer allows independent selectable gains for each channel from 0 to 22.5 dB in +1.5 dB steps. The Codec can operate either in a global stereo mode or in a global mono mode with left channel inputs appearing at both channel outputs. AUX1 and AUX2 analog stereo signals can be mixed in the analog domain with the DAC output. Each channel of each auxiliary analog input can be independently gained/attenuated from +12 dB to -34.5 dB in -1.5 dB steps or completely muted. The post mixed DAC output is available on OUT externally and as an input to the ADCs. Even if the AD1846 is not playing back data from its DACs, the analog mix function can still be active. The AD1846 Σ∆ ADCs incorporate a fourth order modulator. A single pole of passive filtering is all that is required for antialiasing the analog input because of the ADC’s high 64 times oversampling ratio. The ADCs include linear phase digital decimation filters that low-pass filter the input to 0.4×FS. (“FS” is the word rate or “sampling frequency”).

• Low Cost, Pin- and Register-Compatible Alternative to AD1848
• Single-Chip Integrated ΣΔ Digital Audio Stereo Codec
• Supports the Microsoft Windows Sound System
• Multiple Channels of Stereo Input and Output
• Analog and Digital Signal Mixing
• Programmable Gain and Attenuation
• On-Chip Signal Filters
• Digital Interpolation and Decimation
• Analog Output Low-Pass
• Sample Rate from 5.5 kHz to 48 kHz
• 68-Lead PLCC Package
• Operation from +5 V Supply
• Byte-Wide Parallel Interface to ISA and EISA Buses
• Supports One or Two DMA Channels and Programmed I/O