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EnergyMath EM74LVC1G126GS
| Manufacturer | EnergyMathAsian Brands |
| MPN | EM74LVC1G126GS |
| LCSC Part # | C49188133 |
| Packaging | DFN-6L(1x1) |
| Customer # | |
| Key Attributes | Bus buffer/line driver; 3-state |
| Datasheet |  EnergyMath EM74LVC1G126GS |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | EnergyMath | |
| Packaging | DFN-6L(1x1) | |
| Input type | Schmitt trigger | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 24mA | |
| Series | 74LVC | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 1 | |
| Channel Type | Unidirectional | |
| Features | Level shifting;Power-off isolation;Output enable | |
| Number of Elements | 1 | |
| Quiescent Current | 4uA | |
| Propagation Delay | 3.6ns@3.3V,50pF |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74LVC1G126 is a single buffer/line driver with 3-state output. Inputs can be driven by 3.3V or 5V devices. This feature allows these devices to be used as level translators in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuit disables the output, preventing potentially destructive backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- Overvoltage-tolerant inputs up to 5.5 V
- High noise immunity
- CMOS low power consumption
- I_OFF circuitry enables partial power-down mode operation
- ±24 mA output drive capability (V_CC = 3.0 V)
- Latch-up performance exceeds 100 mA
- Direct interface with TTL levels
- Compliant with JEDEC standards: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V; MM JESD22-A115C Class C exceeds 550 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.0976 | $ 0.49 |
| 50+ | $ 0.0776 | $ 3.88 |
| 150+ | $ 0.0677 | $ 10.16 |
| 500+ | $ 0.0602 | $ 30.10 |
| 3,000+ | $ 0.0542 | $ 162.60 |
| 6,000+ | $ 0.0512 | $ 307.20 |
Standard Packaging3000/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers | |
| Manufacturer | EnergyMath | |
| Packaging | DFN-6L(1x1) | |
| Input type | Schmitt trigger | |
| Voltage - Supply | 1.65V~5.5V | |
| Output Type | Tri-State | |
| Current - Output High(IOH) | 24mA | |
| Series | 74LVC | |
| Operating Temperature | -40℃~+125℃ | |
| Current - Output Low(IOL) | 24mA | |
| Number of Bits per Element | 1 | |
| Channel Type | Unidirectional | |
| Features | Level shifting;Power-off isolation;Output enable | |
| Number of Elements | 1 | |
| Quiescent Current | 4uA | |
| Propagation Delay | 3.6ns@3.3V,50pF |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 3000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The EM74LVC1G126 is a single buffer/line driver with 3-state output. Inputs can be driven by 3.3V or 5V devices. This feature allows these devices to be used as level translators in mixed 3.3V and 5V environments. Schmitt-trigger action on all inputs makes the circuit tolerant of slower input rise and fall times. The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuit disables the output, preventing potentially destructive backflow current through the device when it is powered down.
Features
- Wide supply voltage range: 1.65 V to 5.5 V
- Overvoltage-tolerant inputs up to 5.5 V
- High noise immunity
- CMOS low power consumption
- I_OFF circuitry enables partial power-down mode operation
- ±24 mA output drive capability (V_CC = 3.0 V)
- Latch-up performance exceeds 100 mA
- Direct interface with TTL levels
- Compliant with JEDEC standards: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
- ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V; MM JESD22-A115C Class C exceeds 550 V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
- Multiple package options
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | - |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |