LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
Cart
EnergyMath EM74LVC2G14GV product image
  • EM74LVC2G14GV thumbnail 1
  • EM74LVC2G14GV thumbnail 2
  • EM74LVC2G14GV thumbnail 3
  • Pinout
  • Footprint
Images for reference only

EnergyMath EM74LVC2G14GVRoHS

Manufacturer
EnergyMathAsian Brands
MPN
EM74LVC2G14GV
LCSC Part #
C49188098
Packaging
SOT-23-6L
Customer #
Key Attributes
Dual inverting Schmitt trigger with 5V tolerant input
Datasheetpdf iconEnergyMath EM74LVC2G14GV
In-Stock: 2,980
2,980 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
10+$ 0.0542$ 0.54
100+$ 0.0432$ 4.32
300+$ 0.0376$ 11.28
3,000+$ 0.0335$ 100.50
6,000+$ 0.0301$ 180.60
9,000+$ 0.0285$ 256.50
Standard Packaging3000/Full Reel
Better price for more quantity?
$

Products Specifications

Show similar products (0) >
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerEnergyMath
PackagingSOT-23-6L
Logic Family74LVC
Input TypeSchmitt trigger
Voltage - Supply1.65V~5.5V
Output Logic Level - Low-
Propagation Delay5ns@5.5V,50pF
FeaturesPower shutdown protection;Noise suppression function
Input Logic Level - Low-
Input Logic Level - High-
Operating Temperature-40℃~+125℃
Number of Circuits2
Output Logic Level - High-
Quiescent Current(Iq)4uA
Number of Channels-
Current - Output High(IOH)24mA
Current - Output Low(IOL)24mA
Report an ErrorShow similar products (0) >

Additional Information

TypeDetails
Minimum10
Multiple10
Standard Packaging3000
Sales UnitPiece

Introduction

AI Translation

The EM74LVC2G14 is a dual inverter with Schmitt-trigger inputs. Its inputs can be driven by 3.3 V or 5 V devices. This feature allows the device to be used as a level translator in mixed 3.3 V and 5 V environments. The device is fully specified for partial-power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially damaging backflow current when the device is powered down.

Features

AI Translation
  • Wide supply voltage range: 1.65 V to 5.5 V
  • Input overvoltage tolerance up to 5.5 V
  • High noise immunity
  • ±24 mA output drive capability (at VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 100 mA
  • Direct TTL-level interface compatible
  • IOFF circuit for partial power-down mode operation
  • Unlimited rise and fall times
  • Compliant with JEDEC standards: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V, MM JESD22-A115C Class C exceeds 550 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options