ADI ADAU1978WBCPZ

The ADAU1978 integrates four high-performance ADCs with AC-coupled inputs delivering 2 V rms performance. These ADCs employ a Σ-Δ architecture with a continuous-time front end for low EMI performance. An I2C/SPI control port allows a microcontroller to adjust volume and many other parameters. The ADAU1978 operates from a single 3.3 V supply, with the required digital DVDD supply generated internally. A low-power architecture reduces overall device power consumption. The ADAU1978 is available in a 40-lead LFCSP package. An on-chip PLL derives the master clock from either an external clock input or a frame clock (sample rate clock), eliminating the need for a separate high-frequency master clock in the system when the frame clock is used.

• Quad 2 V rms differential inputs
• On-chip PLL for master clock generation
• Low EMI design
• ADC dynamic range: 109 dB
• THD+N: −95 dB
• Optional digital high-pass filter
• 24-bit stereo ADC, 8 kHz to 192 kHz sample rates
• Digital volume control
• I2C/SPI controllable for enhanced flexibility
• Software-controlled glitchless mute
• Software power-down
• Right-justified, left-justified, I2S, and TDM modes
• Master and slave operation modes
• 40-lead LFCSP package
• Qualified for automotive applications

• Automotive audio systems
• Active noise cancellation systems