ST STM32N657L0H3Q
| Manufacturer | |
| MPN | STM32N657L0H3Q |
| LCSC Part # | C42457345 |
| Packaging | BGA-223(10x10) |
| Customer # | |
| Key Attributes | 1.71V~3.6V BGA-223(10x10) Memory |
| Datasheet | ST STM32N657L0H3Q |
Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | BGA-223(10x10) | |
| Operating Temperature | -40℃~+125℃ | |
| Number of I/O | 144 | |
| Voltage - Supply | 1.71V~3.6V |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | BGA-223(10x10) |
| Type | Description | |
|---|---|---|
| Operating Temperature | -40℃~+125℃ | |
| Number of I/O | 144 | |
| Voltage - Supply | 1.71V~3.6V |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- Incorporates ST advanced proprietary technology
- Arm 32-bit Cortex-M55 core, 3360 CoreMark, up to 800 MHz, 32-Kbyte instruction cache, 32-Kbyte data cache, CoreMark score 4.47
- Arm MVE (M-Profile Vector Extension), Helium technology, TrustZone MPU, NVIC
- Half-precision, single-precision, and double-precision FPU supporting vector and scalar half-precision, single-precision, and double-precision floating-point data types
- ST Neural-ART accelerator, up to 1 GHz, 600 Gbps, 288 MAC/cycle
- Dedicated hardware unit for deep neural network inference
- Flexible dedicated streaming processing engine
- Real-time encryption/decryption
- Dynamic weight decompression
- 4.2-Mbyte contiguous SRAM
- 128-Kbyte ECC DTCM RAM for critical real-time data + 64-Kbyte ECC ITCM RAM for critical real-time routines
- 8-Kbyte backup SRAM, available in V_BAT mode
- Flexible external memory controller supporting up to 32-bit data bus with cryptographic engine: SRAM, PSRAM, SDRAM/LPSDR, NOR/NAND memory
- XSPI supporting serial PSRAM, NAND, NOR, HyperRAM/HyperFlash frame formats
- 2 ports: XSPIM 8-bit and 16-bit configuration, up to 200 MHz
- Neo-Chrom 2.5D GPU: scaling, rotation, alpha blending, texture mapping, perspective transformation
- Chrom-ART accelerator
- Hardware JPEG codec with MJPEG support
- LCD-TFT controller, up to XGA resolution
- Parallel and 2-lane CSI-2 camera interfaces
- ISP with three parallel processing pipelines on the same input stream: bad pixel correction, decimation, black level, exposure, demosaicing, column conversion, contrast, cropping, downscaling, ROI, gamma correction, YUV conversion, pixel packer
- H264 video encoding acceleration: Baseline, Main, and High profiles, levels 1 to 5.2, 1080p15 and 720p30
- Arm TrustZone with protectable I/O, memory, and peripherals
- SESIP Level 3, Arm PSA certified
- Flexible lifecycle scheme with read-out protection and password-protected debug
- Secure customer key provisioning in OTP fuses
- Secure boot code in ROM for decryption and authentication of customer updatable root of trust
- Secure data storage using hardware keys
- TF-M secure firmware update support
- Two AES coprocessors, one with DPA resistance
- Public key accelerator with DPA resistance
- Dynamic encryption/decryption of external memory
- HASH hardware accelerator
- True RNG compliant with NIST SP800-90B
- 96-bit unique ID
- 1.5-Kbyte OTP fuses
- Active tamper detection
- 2× USB 2.0 HS/FS device/host OTG controllers (one with UCPD USB Type-C power delivery support)
- 10-Mbit, 100-Mbit, and 1-Gbit Ethernet with TSN support
- 4× I2C Fm+ interfaces
- 6× SPI, four with I2S support
- 2× SAI supporting four digital microphones
- 5× USART, 5× UART with ISO7816 interface, LIN, IrDA support, up to 12.5 Mbit/s + 1× LPUART
- 2× SDMMC: MMC version 4.0, CE-ATA version 1.0, and SD version 1.0.1 support
- 3× FDCAN with TTCAN support
- Sleep, Stop, and Standby modes
- V_BAT supply for RTC, 32× 32-bit backup registers + 8-Kbyte backup SRAM
- 4× 32-bit timers supporting up to four input captures/output compares/PWM or pulse counters and quadrature encoder inputs, up to 240 MHz
- 2× 16-bit advanced motor control timers, up to 240 MHz
- 13× 16-bit general-purpose timers and 5× 16-bit low-power timers, up to 240 MHz
- 2× watchdogs
- 1× SysTick timer
- RTC with sub-second accuracy and hardware calendar
- Development support: SWD, JTAG, ETM
- Up to 165 I/O pins
- 1× temperature sensor
- 2× ADC, up to 12-bit resolution, up to 5 Msps, up to 20 channels
- 1× ADF filter with SAD and 1× MDF
- POR, PDR, programmable UVD, and BOR
- Embedded SMPS buck converter providing core voltage from 1.71 to 3.6 V, application and I/O supply
- Dedicated power supply for USB, XSPIM1, XSPIM2, SDMMC1, and SDMMC2 I/Os
- Backup regulator
- Voltage reference for analog peripherals
- Internal oscillators: 64 MHz HSI, 4 MHz MSI, 32 kHz LSI
- External oscillators: 16 to 48 MHz HSE, 32.768 kHz LSE
- 4× PLLs with fractional mode
- ECOPACK2 compliant packages
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| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 22.1436 | $ 22.14 |
| 10+ | $ 21.3963 | $ 213.96 |
Standard Packaging168/Full Tray | ||
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Products Specifications
All
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | BGA-223(10x10) | |
| Operating Temperature | -40℃~+125℃ | |
| Number of I/O | 144 | |
| Voltage - Supply | 1.71V~3.6V |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | ST | |
| Packaging | BGA-223(10x10) |
| Type | Description | |
|---|---|---|
| Operating Temperature | -40℃~+125℃ | |
| Number of I/O | 144 | |
| Voltage - Supply | 1.71V~3.6V |
Help & FeedbackShow similar products (0) >
Features
AI Translation
- Incorporates ST advanced proprietary technology
- Arm 32-bit Cortex-M55 core, 3360 CoreMark, up to 800 MHz, 32-Kbyte instruction cache, 32-Kbyte data cache, CoreMark score 4.47
- Arm MVE (M-Profile Vector Extension), Helium technology, TrustZone MPU, NVIC
- Half-precision, single-precision, and double-precision FPU supporting vector and scalar half-precision, single-precision, and double-precision floating-point data types
- ST Neural-ART accelerator, up to 1 GHz, 600 Gbps, 288 MAC/cycle
- Dedicated hardware unit for deep neural network inference
- Flexible dedicated streaming processing engine
- Real-time encryption/decryption
- Dynamic weight decompression
- 4.2-Mbyte contiguous SRAM
- 128-Kbyte ECC DTCM RAM for critical real-time data + 64-Kbyte ECC ITCM RAM for critical real-time routines
- 8-Kbyte backup SRAM, available in V_BAT mode
- Flexible external memory controller supporting up to 32-bit data bus with cryptographic engine: SRAM, PSRAM, SDRAM/LPSDR, NOR/NAND memory
- XSPI supporting serial PSRAM, NAND, NOR, HyperRAM/HyperFlash frame formats
- 2 ports: XSPIM 8-bit and 16-bit configuration, up to 200 MHz
- Neo-Chrom 2.5D GPU: scaling, rotation, alpha blending, texture mapping, perspective transformation
- Chrom-ART accelerator
- Hardware JPEG codec with MJPEG support
- LCD-TFT controller, up to XGA resolution
- Parallel and 2-lane CSI-2 camera interfaces
- ISP with three parallel processing pipelines on the same input stream: bad pixel correction, decimation, black level, exposure, demosaicing, column conversion, contrast, cropping, downscaling, ROI, gamma correction, YUV conversion, pixel packer
- H264 video encoding acceleration: Baseline, Main, and High profiles, levels 1 to 5.2, 1080p15 and 720p30
- Arm TrustZone with protectable I/O, memory, and peripherals
- SESIP Level 3, Arm PSA certified
- Flexible lifecycle scheme with read-out protection and password-protected debug
- Secure customer key provisioning in OTP fuses
- Secure boot code in ROM for decryption and authentication of customer updatable root of trust
- Secure data storage using hardware keys
- TF-M secure firmware update support
- Two AES coprocessors, one with DPA resistance
- Public key accelerator with DPA resistance
- Dynamic encryption/decryption of external memory
- HASH hardware accelerator
- True RNG compliant with NIST SP800-90B
- 96-bit unique ID
- 1.5-Kbyte OTP fuses
- Active tamper detection
- 2× USB 2.0 HS/FS device/host OTG controllers (one with UCPD USB Type-C power delivery support)
- 10-Mbit, 100-Mbit, and 1-Gbit Ethernet with TSN support
- 4× I2C Fm+ interfaces
- 6× SPI, four with I2S support
- 2× SAI supporting four digital microphones
- 5× USART, 5× UART with ISO7816 interface, LIN, IrDA support, up to 12.5 Mbit/s + 1× LPUART
- 2× SDMMC: MMC version 4.0, CE-ATA version 1.0, and SD version 1.0.1 support
- 3× FDCAN with TTCAN support
- Sleep, Stop, and Standby modes
- V_BAT supply for RTC, 32× 32-bit backup registers + 8-Kbyte backup SRAM
- 4× 32-bit timers supporting up to four input captures/output compares/PWM or pulse counters and quadrature encoder inputs, up to 240 MHz
- 2× 16-bit advanced motor control timers, up to 240 MHz
- 13× 16-bit general-purpose timers and 5× 16-bit low-power timers, up to 240 MHz
- 2× watchdogs
- 1× SysTick timer
- RTC with sub-second accuracy and hardware calendar
- Development support: SWD, JTAG, ETM
- Up to 165 I/O pins
- 1× temperature sensor
- 2× ADC, up to 12-bit resolution, up to 5 Msps, up to 20 channels
- 1× ADF filter with SAD and 1× MDF
- POR, PDR, programmable UVD, and BOR
- Embedded SMPS buck converter providing core voltage from 1.71 to 3.6 V, application and I/O supply
- Dedicated power supply for USB, XSPIM1, XSPIM2, SDMMC1, and SDMMC2 I/Os
- Backup regulator
- Voltage reference for analog peripherals
- Internal oscillators: 64 MHz HSI, 4 MHz MSI, 32 kHz LSI
- External oscillators: 16 to 48 MHz HSE, 32.768 kHz LSE
- 4× PLLs with fractional mode
- ECOPACK2 compliant packages
C42457345 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | 5A992C |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| ECCN | 5A992C |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |



