SDIC Microelectronics SD2085

SD2085 is a CMOS single-chip modem designed specifically for implementing the HART protocol, for use in field instruments and controllers that support the HART protocol. The device integrates all necessary filtering, signal detection, modulation, demodulation, and HART signal waveform shaping functions, requiring only a small number of passive peripheral components to meet the HART physical layer specification requirements.

SD2085 uses phase-continuous FSK technology at a transmission rate of 1200 bps, with half-duplex communication, compliant with the HART protocol physical layer requirements. The maximum supply current in modulation mode is 85μA at 3.6V with an external 3.6864MHz clock.

The HART input signal is sampled by an ADC, then digitally filtered and demodulated. This architecture ensures reliable signal detection in noisy environments. The DAC output generates phase-continuous trapezoidal waveforms at 1200Hz and 2200Hz.

Thanks to its high level of integration, minimal peripheral components, and 5mm x 5mm QFN package, the SD2085 significantly reduces board space and is ideally suited for low-power, loop-powered applications in both master and slave configurations.

• Single-chip, half-duplex 1200bps FSK modem
• Compliant with HART communication protocol physical layer requirements
• Compliant with Bell 202 standard carriers 1200Hz and 2200Hz
• HART waveform-shaping output with additional drive capability
• DSP-based reliable input signal detection
• UART interface
• Operating voltage 2.7~3.6V
• Low power consumption, max 85μA in modulation mode
• Operating temperature range -55°C to +125°C
• 20-pin 5mm x 5mm x 0.75mm TQFN package
• RoHS compliant