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Infineon/CYPRESS CY8C4014LQI-421TRoHS

Manufacturer
MPN
CY8C4014LQI-421T
LCSC Part #
C382039
Packaging
QFN-16-EP(3x3)
Customer #
Key Attributes
PSoC 4: PSoC 4000 Family
Datasheetpdf iconInfineon/CYPRESS CY8C4014LQI-421T
In-Stock: 198
198 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 1.2589$ 0.4281$ 0.43
10+$ 1.0456$ 0.3555$ 3.56
30+$ 0.9299$ 0.3162$ 9.49
100+$ 0.798$ 0.2714$ 27.14
500+$ 0.7394$ 0.2514$ 125.70
1,000+$ 0.7133$ 0.2426$ 242.60
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Embedded/Microcontrollers
ManufacturerInfineon/CYPRESS
PackagingQFN-16-EP(3x3)
DAC (Bit)8bit;7bit
Operating Temperature-40℃~+85℃
Program Memory TypeFLASH
Voltage - Supply1.71V~5.5V
EEPROM-
Program Storage Size16KB
CPU CoreARM Cortex-M0
Core Size32 Bit
CPU Maximum Speed16MHz
Oscillator TypeBuilt-in
Number of I/O12

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM Cortex-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4000 product family is the smallest member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, and general-purpose analog. PSoC 4000 products will be fully upward compatible with members of the PSoC 4 platform for new applications and design needs.

Features

AI Translation
  • 16-MHz ARM Cortex-M0 CPU
  • Up to 16 KB of flash with Read Accelerator
  • Up to 2 KB of SRAM
  • Two current DACs (IDACs) for general-purpose or capacitive sensing applications
  • One low-power comparator with internal reference
  • 1.71-V to 5.5-V operation
  • Deep Sleep mode with wake-up on interrupt and I²C address detect
  • Cypress CapSense Sigma-Delta (CSD) provides best-in-class signal-to-noise ratio (SNR) and water tolerance
  • Cypress-supplied software component makes capacitive sensing design easy
  • Automatic hardware tuning (SmartSense™) over a sensor range of 5 pF to 45 pF
  • Multi-master I²C block with the ability to do address matching during Deep Sleep and generate a wake-up on match
  • One 16-bit timer/counter/pulse-width modulator (TCPWM) block
  • Center-aligned, Edge, and Pseudo-Random modes
  • Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications
  • Up to 20 Programmable GPIO Pins
  • 28-pin SSOP, 24-pin QFN, 16-pin SOIC, 16-pin QFN, 16 ball WLCSP, and 8-pin SOIC packages
  • GPIO pins on Ports 0, 1, and 2 can be CapSense or have other functions
  • Drive modes, strengths, and slew rates are programmable
  • Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital automatic routing)
  • Applications Programming Interface (API) component for all fixed-function and programmable peripherals
  • After schematic entry, development can be done with ARM-based industry-standard development tools