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Tudi AT24C512C-SSHD-T-TUDIRoHS

Manufacturer
TudiAsian Brands
MPN
AT24C512C-SSHD-T-TUDI
LCSC Part #
C36533649
Packaging
SOP-8
Customer #
Key Attributes
128K-bit I2C-Compatible Serial EEPROM
Datasheetpdf iconTudi AT24C512C-SSHD-T-TUDI
In-Stock: 1,020
1,020 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
5+$ 0.3515$ 1.76
50+$ 0.2821$ 14.11
150+$ 0.2523$ 37.85
500+$ 0.2152$ 107.60
2,500+$ 0.1656$ 414.00
5,000+$ 0.1557$ 778.50
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory (ICs)
ManufacturerTudi
PackagingSOP-8
Voltage - Supply1.7V~5.5V
Memory Size512Kbit
Operating temperature-40℃~+85℃
Clock Frequency1MHz
FeaturesHardware write protection function;Built-in power-on reset (POR);Page write protection function;Noise suppression function
Data Retention - TDR (Year)100 Years
Write Cycle Time(tWC)5ms
Write Cycle Endurance1,000,000 cycles
InterfaceI2C

Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

The AT24C5 12/CAT24C512 are EEPROM devices that use the industrial - standard 2 - wire interface for communications. The 24C512 contains a memory array of 512K - bits (65,536x8), which is organized in 128 - byte per page. The EEPROM can operate in a wide voltage range from 1.7V to 5.5V which fits most application. This product can provide a low - power 2 - wire EEPROM solution. The device is offered in Lead - free, RoHS, halogen free or Green. The available package types are 8 - pin SOIC/SOP, TSSOP, DFN and CSP. The 24C512 is compatible with the industrial standard 2 - wire bus protocol. If in case the bus is not responded, a new sent Op - code command will reset the bus and the device will respond correctly. The simple bus consists of the Serial Clock wire (SCL) and the Serial Data wire (SDA). Utilizing such bus protocol, a Master device, such as a microcontroller, can usually control one or more Slave devices, alike this 24C512. The bit stream over the SDA line includes a series of bytes, which identifies a particular Slave device, an instruction, an address within that Slave device, and a series of data, if appropriate. The 24C512 also has a Write Protect pin (WP) to allow blocking any write operations over specified memory area. Under no circumstance, the device will be hung up. In order to refrain the state machine entering into a wrong state during power - up sequence or a power toggle off - on condition, a power on reset circuit is embedded. During power - up, the device does not respond to any instructions until the supply voltage (VCC) has reached an acceptable stable level above the reset threshold voltage. Once VCC passes the power on reset threshold, the device is reset and enters into the Standby mode. This would also avoid any inadvertent Write operations during power - up stage. During power - down process, the device will enter into standby mode, once Vcc drops below the power on reset threshold voltage. In addition, the device will be in standby mode after receiving the Stop command, provided that no internal write operation is in progress. Nevertheless, it is illegal to send a command unless the VCC is within its operating level.

Features

AI Translation
  • Two - Wire Serial Interface, Ω²C™ Compatible
  • Bi - directional data transfer protocol
  • Wide - voltage Operation – VCC = 1.7V to 5.5V
  • Speed: 400 KHz (1.7V) and 1 MHz (2.5V ~ 5.5V)
  • Standby current (max.): 1 μA, 1.7V
  • Operating current (max.): 2 mA, 1.7V
  • Hardware Data Protection Write Protect Pin
  • Sequential & Random Read Features
  • Memory organization: 65,536x8 bits
  • Page Size: 128 bytes
  • Page write mode – Up to 128 bytes per page write
  • Self timed write cycle with auto clear: 5ms (max.)
  • Filtered inputs for noise suppression
  • High - reliability – Endurance: 1 million cycles
  • Data retention: 100 years
  • Industrial temperature grades
  • Packages: SOIC/SOP, TSSOP, DFN and CSP
  • Lead - free, RoHS, Halogen free, Green