Kingston EMMC256-IY29-5B102
| Manufacturer | |
| MPN | EMMC256-IY29-5B102 |
| LCSC Part # | C36105543 |
| Packaging | FBGA-153(11.5x13) |
| Customer # | |
| Key Attributes | 256GB TLC eMMC 5.1 FBGA-153(11.5x13) Memory RoHS |
| Datasheet | Kingston EMMC256-IY29-5B102 |
| Alternative Parts | 5 |
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Kingston | |
| Packaging | FBGA-153(11.5x13) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Built-in wear leveling function;Bad block management function;ECC error correction function;Power-down data protection function;Hardware reset function;Enhanced write protection function;Secure write protection function;Secure erase function | |
| Memory Size | 256GB | |
| Reading Speed in Sequence | 310MB/S | |
| Writing Speed in Sequence | 240MB/S | |
| NAND Flash Type | TLC | |
| NAND Stand-By Current | - | |
| Controller Stand-By Current | - | |
| NAND Operating Voltage (VCCF) | 2.7V~3.6V | |
| Interface | eMMC 5.1 | |
| Controller Operating Voltage (VCCQ) | 1.7V~1.95V;2.7V~3.6V |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Kingston | |
| Packaging | FBGA-153(11.5x13) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Built-in wear leveling function;Bad block management function;ECC error correction function;Power-down data protection function;Hardware reset function;Enhanced write protection function;Secure write protection function;Secure erase function | |
| Memory Size | 256GB | |
| Reading Speed in Sequence | 310MB/S |
| Type | Description | |
|---|---|---|
| Writing Speed in Sequence | 240MB/S | |
| NAND Flash Type | TLC | |
| NAND Stand-By Current | - | |
| Controller Stand-By Current | - | |
| NAND Operating Voltage (VCCF) | 2.7V~3.6V | |
| Interface | eMMC 5.1 | |
| Controller Operating Voltage (VCCQ) | 1.7V~1.95V;2.7V~3.6V |
Introduction
Kingston's e·MMC™ products comply with the JEDEC e·MMC™ 5.1 standard. These devices are ideal general-purpose storage solutions for a wide range of commercial and industrial applications. In a single integrated package, e·MMC™ combines Triple-Level Cell (TLC) NAND flash with an on-board e·MMC™ controller to provide a industry-standard interface to the host system. The integrated e·MMC™ controller directly manages the NAND flash media, relieving the host processor of these tasks, including flash media error control, wear leveling, NAND flash management, and performance optimization. Future revisions of the JEDEC e·MMC™ standard will always maintain backward compatibility. The industry-standard interface to the host processor also ensures compatibility across future NAND flash generations, simplifying product maintenance throughout the product lifecycle.
Kingston's e·MMC™ products support multiple configurations to adapt the e·MMC™ device to your specific application requirements. The most popular configurations described below are available under standard part numbers.
Standard TLC — By default, e·MMC™ devices configure the NAND flash in standard TLC mode. This configuration provides reasonable performance and reliability for many applications.
pseudo-Single Level Cell (pSLC) — The TLC NAND flash in Kingston e·MMC™ devices can be configured to further improve device endurance, data retention, reliability, and performance beyond the standard TLC configuration. This is achieved by converting NAND TLC cells to a pseudo-Single Level Cell (SLC) configuration. In this configuration, device capacity is reduced by 2/3 while performance and reliability are improved. This one-time configuration is implemented by setting the e·MMC™ enhanced attribute for a hardware partition.
Kingston e·MMC™ can be pre-configured with the Reliable Write or pSLC option at no additional cost. Standard TLC devices can also be one-time configured in the field by following the procedures outlined in the JEDEC e·MMC™ specification. The JEDEC e·MMC™ specification allows for many other configurations, such as up to 4 additional General Purpose (GP) hardware partitions, each with the option to support pSLC and Reliable Write. In addition, Kingston offers content loading services to simplify your product assembly while reducing production costs. For more information, please contact your Kingston representative.
Kingston e·MMC™ devices fully comply with JEDEC standard specification No. JESD84-B51. This datasheet provides technical specifications for the Kingston e·MMC™ device family. For specific information on e·MMC™ device features and operation, please refer to the JEDEC e·MMC™ standard.
Features
- Managed NAND flash with e-MMC™ 5.1 interface
- Backward compatible with all previous e-MMC™ specification versions
- 153-ball JEDEC FBGA RoHS-compliant package
- Operating voltage range: VCCQ = 1.8V / 3.3V, VCC = 3.3V
- Industrial temperature range: -40°C ~ +85°C, storage temperature range: -40°C ~ +85°C
- Compliant with e-MMC™ 5.1 JEDEC standard number JESD84-B51
- High-speed e·MMC™ protocol
- Variable clock frequency: 0–200MHz
- 10-wire bus interface (clock, 1-bit command, 8-bit data bus) with optional hardware reset
- Three data bus widths supported: 1-bit (default), 4-bit, 8-bit
- Bus modes: Single Data Rate: up to 52MB/s (8 parallel data lines at 52MHz); Dual Data Rate (DDR-104): up to 104MB/s at 52MHz; High Speed Single Data Rate (HS-200): up to 200MB/s at 200MHz; High Speed Dual Data Rate (HS-400): up to 400MB/s at 200MHz
- Alternate boot operation mode for simplified boot sequence
- SLEEP/AWAKE (CMD5) support — host-initiated explicit sleep mode for power saving
- Enhanced write protection with permanent and partial protection options
- Multiple user data partitions with enhanced attributes for improved reliability
- Error-free memory access
- CRC for reliable command and data communication
- Internal ECC for improved data storage integrity
- Internal enhanced data management algorithm
- Data protection against sudden power failure during program operations
- Security: secure bad block erase command; enhanced write protection with permanent and partial protection options
- Power-off notification during sleep
- Field Firmware Update (FFU)
- Production state awareness
- Device health report
- Enhanced strobe
- Cache flush reporting
- Cache barrier
- Background operation control and High Priority Interrupt (HPI)
- RPMB throughput improvement
- Secure write protection
- Pre-EOL information
- Optimized form factor
| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 469.4352 | $ 469.44 |
| 30+ | $ 456.0059 | $ 13680.18 |
Standard Packaging1/Full Bag | ||
Products Specifications
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Kingston | |
| Packaging | FBGA-153(11.5x13) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Built-in wear leveling function;Bad block management function;ECC error correction function;Power-down data protection function;Hardware reset function;Enhanced write protection function;Secure write protection function;Secure erase function | |
| Memory Size | 256GB | |
| Reading Speed in Sequence | 310MB/S | |
| Writing Speed in Sequence | 240MB/S | |
| NAND Flash Type | TLC | |
| NAND Stand-By Current | - | |
| Controller Stand-By Current | - | |
| NAND Operating Voltage (VCCF) | 2.7V~3.6V | |
| Interface | eMMC 5.1 | |
| Controller Operating Voltage (VCCQ) | 1.7V~1.95V;2.7V~3.6V |
| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory | |
| Manufacturer | Kingston | |
| Packaging | FBGA-153(11.5x13) | |
| Operating Temperature | -40℃~+85℃ | |
| Features | Built-in wear leveling function;Bad block management function;ECC error correction function;Power-down data protection function;Hardware reset function;Enhanced write protection function;Secure write protection function;Secure erase function | |
| Memory Size | 256GB | |
| Reading Speed in Sequence | 310MB/S |
| Type | Description | |
|---|---|---|
| Writing Speed in Sequence | 240MB/S | |
| NAND Flash Type | TLC | |
| NAND Stand-By Current | - | |
| Controller Stand-By Current | - | |
| NAND Operating Voltage (VCCF) | 2.7V~3.6V | |
| Interface | eMMC 5.1 | |
| Controller Operating Voltage (VCCQ) | 1.7V~1.95V;2.7V~3.6V |
Introduction
Kingston's e·MMC™ products comply with the JEDEC e·MMC™ 5.1 standard. These devices are ideal general-purpose storage solutions for a wide range of commercial and industrial applications. In a single integrated package, e·MMC™ combines Triple-Level Cell (TLC) NAND flash with an on-board e·MMC™ controller to provide a industry-standard interface to the host system. The integrated e·MMC™ controller directly manages the NAND flash media, relieving the host processor of these tasks, including flash media error control, wear leveling, NAND flash management, and performance optimization. Future revisions of the JEDEC e·MMC™ standard will always maintain backward compatibility. The industry-standard interface to the host processor also ensures compatibility across future NAND flash generations, simplifying product maintenance throughout the product lifecycle.
Kingston's e·MMC™ products support multiple configurations to adapt the e·MMC™ device to your specific application requirements. The most popular configurations described below are available under standard part numbers.
Standard TLC — By default, e·MMC™ devices configure the NAND flash in standard TLC mode. This configuration provides reasonable performance and reliability for many applications.
pseudo-Single Level Cell (pSLC) — The TLC NAND flash in Kingston e·MMC™ devices can be configured to further improve device endurance, data retention, reliability, and performance beyond the standard TLC configuration. This is achieved by converting NAND TLC cells to a pseudo-Single Level Cell (SLC) configuration. In this configuration, device capacity is reduced by 2/3 while performance and reliability are improved. This one-time configuration is implemented by setting the e·MMC™ enhanced attribute for a hardware partition.
Kingston e·MMC™ can be pre-configured with the Reliable Write or pSLC option at no additional cost. Standard TLC devices can also be one-time configured in the field by following the procedures outlined in the JEDEC e·MMC™ specification. The JEDEC e·MMC™ specification allows for many other configurations, such as up to 4 additional General Purpose (GP) hardware partitions, each with the option to support pSLC and Reliable Write. In addition, Kingston offers content loading services to simplify your product assembly while reducing production costs. For more information, please contact your Kingston representative.
Kingston e·MMC™ devices fully comply with JEDEC standard specification No. JESD84-B51. This datasheet provides technical specifications for the Kingston e·MMC™ device family. For specific information on e·MMC™ device features and operation, please refer to the JEDEC e·MMC™ standard.
Features
- Managed NAND flash with e-MMC™ 5.1 interface
- Backward compatible with all previous e-MMC™ specification versions
- 153-ball JEDEC FBGA RoHS-compliant package
- Operating voltage range: VCCQ = 1.8V / 3.3V, VCC = 3.3V
- Industrial temperature range: -40°C ~ +85°C, storage temperature range: -40°C ~ +85°C
- Compliant with e-MMC™ 5.1 JEDEC standard number JESD84-B51
- High-speed e·MMC™ protocol
- Variable clock frequency: 0–200MHz
- 10-wire bus interface (clock, 1-bit command, 8-bit data bus) with optional hardware reset
- Three data bus widths supported: 1-bit (default), 4-bit, 8-bit
- Bus modes: Single Data Rate: up to 52MB/s (8 parallel data lines at 52MHz); Dual Data Rate (DDR-104): up to 104MB/s at 52MHz; High Speed Single Data Rate (HS-200): up to 200MB/s at 200MHz; High Speed Dual Data Rate (HS-400): up to 400MB/s at 200MHz
- Alternate boot operation mode for simplified boot sequence
- SLEEP/AWAKE (CMD5) support — host-initiated explicit sleep mode for power saving
- Enhanced write protection with permanent and partial protection options
- Multiple user data partitions with enhanced attributes for improved reliability
- Error-free memory access
- CRC for reliable command and data communication
- Internal ECC for improved data storage integrity
- Internal enhanced data management algorithm
- Data protection against sudden power failure during program operations
- Security: secure bad block erase command; enhanced write protection with permanent and partial protection options
- Power-off notification during sleep
- Field Firmware Update (FFU)
- Production state awareness
- Device health report
- Enhanced strobe
- Cache flush reporting
- Cache barrier
- Background operation control and High Priority Interrupt (HPI)
- RPMB throughput improvement
- Secure write protection
- Pre-EOL information
- Optimized form factor
C36105543 EasyEDA Library
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | 3A991B1A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | ROHS Compliant |
| ECCN | 3A991B1A |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
Alternative Parts
| MPN | Manufacturer | Alternative Type | Packaging | Availability | Unit Price | ||
|---|---|---|---|---|---|---|---|
| EMMC256-IY29-5B111 | Kingston | Similar | FBGA-153(11.5x13) | 0 | $ 192.5614 | ||
| EMMC256-TY29-5B111 | Kingston | Similar | WFBGA-153(11.5x13) | 0 | $ 291.6184 | ||
| SFEM256GB2ED1TB-I-VG-111-STD | Swissbit | Similar | BGA-153(11.5x13) | 0 | $ 191.6216 | ||
| SFEM256GB1ED1TO-I-8H-111-STD | Swissbit | Similar | BGA-153(11.5x13) | 0 | $ 186.2414 | ||
| SFEM256GB1ED1TO-A-8H-111-STD | Swissbit | Similar | BGA-153(11.5x13) | 0 | $ 192.3273 |