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TI CD74HC573ERoHS

Manufacturer
MPN
CD74HC573E
LCSC Part #
C354058
Packaging
PDIP-20
Customer #
Key Attributes
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Datasheetpdf iconTI CD74HC573E
In-Stock: 221
221 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 0.8222$ 0.82
10+$ 0.7087$ 7.09
40+$ 0.6292$ 25.17
100+$ 0.5643$ 56.43
400+$ 0.5433$ 217.32
1,000+$ 0.5303$ 530.30
Standard Packaging20/Full Tube
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Latches
ManufacturerTI
PackagingPDIP-20
Series74HC
Logic TypeD Latch
Voltage - Supply2V~6V
Current - Output Low(IOL)7.8mA
Operating Temperature-55℃~+125℃
Output TypeTri-State
Setup Time9ns
Number of Channels8
Current - Output High(IOH)7.8mA
Hold Time7ns
Propagation Delay30ns

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging20
Sales UnitPiece

Introduction

AI Translation

The ’HC573 devices are octal transparent D-type latches designed for 2-V to 6-V VCC operation. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE(overline)) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Features

AI Translation
  • 2-V to 6-V VCC Operation
  • Wide Operating Temperature Range of -55℃ to 125℃
  • 3-State Outputs Directly Drive Bus Lines
  • Balanced Propagation Delays and Transition Times
  • Bus Driver Outputs Drive Up To 15 LS-TTL Loads
  • Significant Power Reduction Compared to LS-TTL Logic ICs