AMD ELANSC300-25KI
| Manufacturer | |
| MPN | ELANSC300-25KI |
| LCSC Part # | C3216826 |
| Packaging | QFP-208(28x28) |
| Customer # | |
| Key Attributes | Others 32 Bit 25MHz QFP-208(28x28) Microcontrollers |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | AMD | |
| Packaging | QFP-208(28x28) | |
| Operating Temperature | -40℃~+85℃@(TC) | |
| Program Memory Type | ROMless | |
| Voltage - Supply | 3V~5.5V | |
| EEPROM | - | |
| CPU Core | Others | |
| Core Size | 32 Bit | |
| CPU Maximum Speed | 25MHz | |
| Oscillator Type | Built-in+External |
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
The ÉlanSC300 microcontroller is a highly integrated, low-voltage, single-chip implementation of the Am386SXLV microprocessor plus most of the additional logic needed for an AT-compatible personal computer. It is ideal for embedded PC applications, such as point-of-sale equipment, web appliances, industrial controls, and communication equipment. The ÉlanSC300 microcontroller combines an Am386SXLV low-voltage microprocessor core with a memory control unit, a Power Management Unit (PMU), and the bus control and peripheral control logic of a PC/AT-compatible computer. The ÉlanSC300 microcontroller includes a memory controller that supports up to 16 Mbyte of DRAM, Flash or ROM; power management functions; a bus controller that supports local or ISA bus; a serial port controller that is 16450 UART compatible; a bidirectional EPP-compliant parallel port; a 146818A-compatible real-time clock; internal phase-locked loops for clock generation; and standard PC logic chips (8259A, 8237A, and 8254). The ÉlanSC300 microcontroller’s true static design and low operating voltage enable battery-powered operation and lower weight for embedded PC applications. The internal core of the ÉlanSC300 microcontroller operates at 3.3 V and the I/O pads allow either 3.3 V or 5 V operation. Lowering typical operating voltage from 5 V to 3.3 V can dramatically reduce power consumption. Functionally, the ÉlanSC300 microcontroller is a 100% DOS/Windows-compatible, PC/AT-compatible computer on a chip that is designed to furnish the customer with a high-performance, low-power system solution, providing state-of-the-art power management in a small physical footprint. The ÉlanSC300 microcontroller is available in both 25- and 33-MHz versions, in a 208-lead Plastic Shrink Quad Flat Pack (QFP) (PQR package) and a 208-lead Thin Quad Flat Pack (TQFP) (PQL package).
Features
- Highly integrated, single-chip CPU and system logic
- Optimized for embedded PC applications
- Combines 32 bit, x86 compatible, low-voltage CPU with memory controller, PC/AT peripheral controllers, real-time clock, and PLL clock generators
- 0.7 micron, low-voltage, CMOS process, fully static
- Enhanced Δm386 SXLV CPU core
- 25 MHz or 33 MHz operating frequencies
- 3.3 V core, 3.3 V or 5 V memory and I/O
- Low-power, fully static design for long battery life
- System Management Mode (SMM) for power management control
- Integrated power management functions
- Internal clock generators (using multiple Phase-Locked Loops and one external 32-KHz crystal)
- Supports CPU System Management Mode (SMM)
- Multiple operating modes: High Speed PLL, Low Speed PLL, Doze, Sleep, Suspend, and Off. Fully static design allows stopped clock.
- Comprehensive control of system and peripheral clocks
- Five external power management control pins
- Suspend refresh of DRAM array
- Clock switching during ISA cycles
- Low power consumption: 0.12 mW typical Suspend mode power
- Simultaneous multiple-voltage I/O pads operate at either 3.3 V or 5 V. Core operates at 3.3 V for minimum power consumption.
- Integrated memory controller
- Controls symmetrically addressable DRAM or asymmetrical 512 Kbyte × 8 bit or 1 Mbyte x 16 bit DRAM or SRAM as main memory
- Zero wait-state access with 70 ns, Page mode DRAMs
- Supports up to 16 Mbyte system memory
- Supports up to 16 Mbyte of application ROM/Flash, and 320 Kbyte direct ROM BIOS access. Also supports shadow RAM
- Fully PC/AT compatible
- Integrated PC/AT-compatible peripheral logic
- One programmable interval timer (fully 8254 compatible)
- Two programmable interrupt controllers (8259A compatible)
- Two DMA controllers (8237A compatible)
- Built-in real-time clock (146818A compatible), with an additional 114 bytes of RAM
- Internal Phase-Locked Loops (PLL) generate all clocks from single 32.768 kHz crystal input
- Bus configurations
- 16-bit data path
- Optional bus configurations: Internal LCD controller with subset ISA 386 Local Bus mode with subset ISA, Maximum ISA Bus mode
- Four programmable chip selects
- Built-in 8042 chip select
- Serial port controller (16450 UART compatible)
- Bidirectional parallel port with EPP
- Integrates two PCMCIA Version 2.1 slots
- Integrated CGA-compatible LCD controller
- Fully 6845 compatible
- 16 gray levels in Text mode; 2 or 4 levels in Graphics mode
- Supports the following LCD Panel Sizes: 320×240 single scan (2 bpp), 640×200 single/dual scan (1 bpp), 480×320 single scan (1 bpp)
Applications
- point-of-sale equipment
- web appliances
- industrial controls
- communication equipment
Compliance & Export Codes
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542319090 |
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| TARIC | |
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| MXHTS |
| Type | Details |
|---|---|
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
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