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TI CDP1867CD product image
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TI CDP1867CDRoHS

Manufacturer
TI
MPN
CDP1867CD
LCSC Part #
C3216717
Packaging
CERDIP-18
Customer #
Key Attributes
CMOS 4-Bit Latch and Decoder
Datasheetpdf iconTI CDP1867CD

Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Specialized
ManufacturerTI
PackagingCERDIP-18
Voltage - Supply4V~6.5V
Features-
Operating Temperature-40℃~+85℃
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging1
Sales UnitPiece

Features

AI Translation
  • Performs memory address latch and decoder functions multiplexed or non-muitiplexed Interfaces directly with all CDP1800 family CPUs
  • Can interface directly with the multiplexed address bus of this system at maximum clock frequency, and up to eight 4096-bit random-access memories to provide a 4096-byte RAM system
  • All the necessary chip selects are provided as outputs along with additional enable inputs so that in larger memory systems, the 9-chip 4096-byte blocks can be readily accessed
  • Compatible with non-multiplexed address bus microprocessors
  • By connecting the clock input to VDD the latches are in the data-following mode and the decoded outputs can be used in general-purpose memory-system applications
  • The CDP1866 and CDP1868 are intended for use with 1024-word RAMs and are identical except that in the CDP1868, CE1 and CE2 are latched and CS2 is valid on MwR only
  • The CDP1867 is intended for use with 4096-word RAMs
  • The CDP1866, CDP1867, and CDP1868 are supplied in an 18-lead hermetic dual-in-line ceramic package (D suffix) and an 18-lead plastic package (E suffix). The CDP1866C, CDP1867C, and the CDP1868C are available in chip form (H suffix)
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QtyUnit Price(Reference Only)Total Amount
1+$ 6.4671$ 6.47
200+$ 2.5035$ 500.70
500+$ 2.4147$ 1207.35
1,000+$ 2.3719$ 2371.90
Standard Packaging1/Full Bag
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