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Slkor 74HC164D
| Manufacturer | SlkorAsian Brands |
| MPN | 74HC164D |
| LCSC Part # | C3041281 |
| Packaging | SOP-14 |
| Customer # | |
| Key Attributes | 8-bit Serial-In Parallel-Out (SIPO) Shift Register |
| Datasheet |  Slkor 74HC164D |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | Slkor | |
| Packaging | SOP-14 | |
| Operating temperature | -40℃~+85℃ | |
| Pd - Power Dissipation | - | |
| Voltage - Supply | 2V~6V | |
| Output Type | - | |
| Series | 74HC | |
| Number of Elements | - | |
| Output Current | 25mA | |
| Features | Asynchronous clear function | |
| Propagation Delay | 30ns@6V,50pF | |
| Function | Serial-to-Parallel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.
| Qty | Unit Price | Total Amount |
|---|---|---|
| 5+ | $ 0.1563 | $ 0.78 |
| 50+ | $ 0.1238 | $ 6.19 |
| 150+ | $ 0.1099 | $ 16.49 |
| 500+ | $ 0.0925 | $ 46.25 |
| 2,500+ | $ 0.0769 | $ 192.25 |
| 5,000+ | $ 0.0722 | $ 361.00 |
Standard Packaging2500/Full Reel | ||
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Logic/Shift Registers | |
| Manufacturer | Slkor | |
| Packaging | SOP-14 | |
| Operating temperature | -40℃~+85℃ | |
| Pd - Power Dissipation | - | |
| Voltage - Supply | 2V~6V | |
| Output Type | - | |
| Series | 74HC | |
| Number of Elements | - | |
| Output Current | 25mA | |
| Features | Asynchronous clear function | |
| Propagation Delay | 30ns@6V,50pF | |
| Function | Serial-to-Parallel |
Additional Information
| Type | Details |
|---|---|
| Minimum | 5 |
| Multiple | 5 |
| Standard Packaging | 2500 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| Type | Details |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |