Infineon/CYPRESS CY7C1049DV33-10ZSXIT

The CY7C1049DV33 is a high performance CMOS Static RAM organized as 512K words by 8-bits. Easy memory expansion is provided by an Active LOW Chip Enable (CE), an Active LOW Output Enable (OE), and tri-state drivers. You can write to the device by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight IO pins (IO₀ through IO₇) is then written into the location specified on the address pins (A₀ through A₁₈). You can read from the device by taking Chip Enable (CE (overline)) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the IO pins. The eight input or output pins (IO₀ through IO₇) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1049DV33 is available in standard 400 Mil wide 36 -pin SOJ package and 44-pin TSOP II package with center power and ground (revolutionary) pinout.