Infineon/CYPRESS CY7C194-20VC

CY7C194, CY7C195, and CY7C196 are high-performance CMOS static RAMs organized as 65,536×4 bits. Easy memory expansion is provided through active-low chip enables (CE on CY7C194 and CY7C195; CE1, CE2 on CY7C196) and three-state drivers. They feature automatic power-down, reducing power consumption by 75% when deselected. A write to the device is performed when both the chip enable (CE on CY7C194 and CY7C195; CE1, CE2 on CY7C196) and write enable (WE) inputs are LOW. Data on the four input pins (I/O0 through I/O3) is written to the memory location specified by the address pins (A0 through A15). A read is performed by asserting the chip enable (CE on CY7C194 and CY7C195; CE, CE2 on CY7C196) LOW while write enable (WE) remains HIGH. Under this condition, the contents of the memory location specified by the address pins appear on the four data output pins. A chip coating is used to ensure immunity to alpha particle disturbance.

• Automatic power-down on deselect
• Output Enable (OE) function (7C195 and 7C196)
• CMOS for speed/power
• High speed, tAA=25
• Low active power dissipation 880 mW
• Low standby power dissipation 220 mW
• TTL-compatible inputs and outputs
• ESD protection greater than 2001V