Infineon/CYPRESS CY7C1024AV33-10BGC

The CY7C1024AV33 is a high-performance CMOS static RAM organized as 131,072 words × 24 bits. Easy memory expansion is provided through active-LOW CE1 and CE3, active-HIGH CE2, active-LOW output enable (OE), and three-state drivers. The device features automatic power-down, which significantly reduces power consumption when deselected. Writing to the device is accomplished by asserting chip enables (CE1, CE2, CE3) and pulling the write enable (WE) input LOW. Data on the 24 I/O pins (I/O0–I/O23) is then written to the location specified by the address pins (A0–A16). Reading from the device is accomplished by asserting chip enables (CE1, CE2, CE3) and OE LOW while forcing WE HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the I/O pins. The 24 I/O pins (I/O0–I/O23) are in a high-impedance state when the device is deselected (CE HIGH), output is disabled (OE HIGH), or during a write operation (CE1 and CE3 LOW, CE2 HIGH, and WE LOW). The CY7C1024AV33 is available in a standard 119-ball BGA package and a 100-pin TQFP package.

• High Speed
• tAA = 10 ns
• Center power/ground pin arrangement
• Automatic power-down when deselected
• Easy memory expansion via CE1, CE2, CE3, and OE options