Infineon/CYPRESS CY7C199-25SC

The CY7C199 is a high-performance CMOS static random access memory organized as 32768 words × 8 bits. Memory expansion is easily achieved through an active-LOW chip enable (CE), active-LOW output enable (OE), and three-state drivers. The device features automatic power-down, reducing power consumption by 81% when deselected. The CY7C199 is available in standard 300-mil wide DIP, SOJ, and LCC packages. The active-LOW write enable signal (WE) controls read and write operations of the memory. When both CE and WE inputs are LOW, data on the eight data input/output pins (I/O₀ through I/O₇) is written to the memory location specified by the address on the address pins (A₀ through A₁₄). To read the device, the device is selected and the output is enabled with CE and OE LOW while WE remains deasserted or HIGH. Under these conditions, the contents of the location specified by the information on the address pins appear on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, the output is enabled, and WE is HIGH. A chip coating is applied to improve alpha particle immunity.

• High-speed -10 ns
• Fast t_DOE
• Low active power: 467 mW (max, 12 ns "L" version)
• Low standby power: 0.275 mW (max, "L" version)
• 2V data retention ("L" version only)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected