Infineon/CYPRESS CY8C4A45AZI-483

Cypress' PSoC Analog Coprocessor is a scalable and reconfigurable platform architecture of programmable analog coprocessors that simplify designing embedded systems with multiple sensors. The PSoC Analog Coprocessor device combines PSoC’s flexible Analog Front Ends, programmable analog filters, and high-resolution analog-to-digital converters along with an efficient yet powerful 32-bit Arm Cortex-M0+ based signal processing engine – enabling host processors to easily fetch aggregated, pre-processed, and formatted complex sensor data over serial communication interfaces.

• Programmable Analog Blocks
  • A switched-capacitor Universal Analog Block (UAB) programmable via PSoC Creator as a second-order analog filter, a 12-bit Incremental Delta-Sigma ADC, or two 13-bit Voltage DACs
  • Two dedicated analog-to-digital converters (ADC) including a 12-bit SAR ADC and a 10-bit single-slope ADC
  • Four opamps, two low-power comparators, and a flexible 38-channel analog mux to create custom Analog Front Ends (AFE)
  • Two 7-bit Current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin
• CapSense Capacitive Sensing
  • Cypress's fourth-generation CapSense Sigma-Delta (CSD) providing best-in-class signal-to-noise ratio (SNR) and water tolerance
  • Cypress-supplied software component makes capacitive sensing design easy
  • Automatic hardware tuning (SmartSense)
• Segment LCD Drive
  • LCD drive supported on all pins (common or segment)
  • Operates in Deep-Sleep mode with four bits per pin memory
• Programmable Digital Peripherals
  • Three independent serial communication blocks (SCBs) that are run-time configurable as I2C, SPI or UART
  • Eight 16-bit timer/counter/pulse-width modulator (TCPWM) blocks with center-aligned, edge, and pseudo-random modes
• 32-bit Signal Processing Engine
  • Arm Cortex-M0+ CPU up to 48 MHz
  • Up to 32 KB of flash with read accelerator
  • Up to 4 KB of SRAM
  • Eight-channel descriptor-based DMA controller
• Low-Power Operation
  • 1.71-V to 5.5-V operation
  • Deep-Sleep mode with operational analog and 2.5-μA digital system current
  • Watch Crystal Oscillator (WCO)
• Programmable GPIO Pins
  • Up to 38 GPIOs that can be used for analog, digital, CapSense, or LCD functions with programmable drive modes, strength and slew rates
  • Includes eight Smart I/Os to implement pin-level Boolean operations on input and output signals
  • 48-pin QFN, 48-pin TQFP, 28-pin SSOP, and 45-ball WLCSP packages
• PSoC Creator Design Environment
  • Integrated design environment (IDE) provides schematic-capture design entry and build (with automatic routing of analog and digital signals) and concurrent firmware development with an Arm-SWD debugger
  • GUI-based configurable PSoC Components with fully engineered embedded initialization, calibration and correction algorithms
  • Application programming interfaces (API) for all fixed-function and programmable peripherals
• Industry-Standard Tool Compatibility
  • After schematic-capture, firmware development can be done with Arm-based industry-standard development tools