STC Micro STC11F60XE-35I-PDIP40

STC11/10xx series 1T 8051 MCU with external data bus, high-speed, high-reliability, 1–2 UARTs STC11xx series 1T 8051 MCU without external data bus, high-speed, high-reliability, 1–2 UARTs

• High speed: 1 clock/machine cycle, enhanced 8051 core, 6～12x faster than standard 8051
• Wide voltage range: 5.5～4.1V/3.7V, 2.1/2.4～3.6V (STC11/10L series)
• Low power design: Idle mode (can be woken up by any interrupt)
• Low power design: Power-down mode (can be woken up by any external interrupt, supports falling edge/low level and remote wake-up; STC11xx series also supports wake-up via dedicated internal power-down wake-up timer)
• Pins supporting power-down wake-up: P3.2/INT0, P3.3/INT1, T0/P3.4, T1/P3.5, RxD/P3.0 (or RxD/P1.6)
• Dedicated internal power-down wake-up timer (STC11 series only; not available in STC10 series)
• Operating frequency: 0～35MHz, equivalent to standard 8051: 0～420MHz
• Clock: External crystal or internal RC oscillator selectable, configured during ISP download programming
• 4/8/12/16/32/48/60/62K bytes on-chip Flash program memory, endurance >100,000 erase/write cycles
• 1280/512/256 bytes on-chip RAM data memory
• Large-capacity on-chip EEPROM, endurance >100,000 erase/write cycles
• ISP/IAP, in-system programmable/in-application programmable, no programmer/emulator required
• 2× 16-bit timers, compatible with standard 8051 timers T0/T1
• 1 independent baud rate generator (eliminates need for T2 as baud rate generator); T1 is used as baud rate generator by default
• Programmable clock output: T0 outputs clock on P3.4, T1 outputs clock on P3.5, BRT outputs clock on P1.0
• Hardware watchdog timer (WDT)
• Full-duplex UART, compatible with standard 8051, can be used as 2 serial ports (switchable between P3 and P1)
• Advanced instruction set architecture, compatible with standard 8051 instruction set, with hardware multiply/divide instructions
• General-purpose I/O (36/40 pins); after reset: quasi-bidirectional/weak pull-up (standard 8051 I/O mode); configurable in four modes: quasi-bidirectional/weak pull-up, strong push-pull/strong pull-up, input only/high-impedance, open-drain
• Each I/O pin can sink/source up to 20mA; for 44/40-pin ICs, total chip current is recommended not to exceed 120mA
• If I/O pins are insufficient, 3 general-purpose I/O lines can interface with 74HC595 for expansion; multiple chips can be cascaded to expand by dozens of I/O pins; ADC-based key scanning can also save I/O pins
• Advanced encryption using Macro Crystal 6th-generation encryption technology
• Exceptional EMI immunity and ESD protection; passes 20,000V ESD test at system level
• High speed, 1 clock/machine cycle; supports low-frequency crystals for significant EMI reduction
• Up to 40 I/O pins; reset pin can be used as I/O, eliminating external reset circuit
• Ultra-low power consumption: Power-down mode: <0.1μA with external interrupt wake-up, supports falling edge/low level and remote wake-up; STC11xx series adds dedicated power-down wake-up timer with typical current <2μA when active; Idle mode: typical <1.3mA; Normal operating mode: 2mA～7mA
• In-system programmable, no programmer or emulator required, supports remote upgrade
• Compatible with STC-ISP programmer, throughput up to 10,000 devices/person/day
• Integrated high-reliability internal reset circuit; reset pin can be left floating when configured as I/O
• 1/2/3/4/5/6K bytes on-chip Flash program memory, endurance >100,000 erase/write cycles
• 256 bytes on-chip RAM data memory
• General-purpose I/O (16/14/12 pins); after reset: quasi-bidirectional/weak pull-up (standard 8051 I/O mode); configurable in four modes: quasi-bidirectional/weak pull-up, strong push-pull/strong pull-up, input only/high-impedance, open-drain
• Each I/O pin can sink/source up to 20mA; for 20/18/16-pin ICs, total chip current is recommended not to exceed 70mA

• Water meters
• Gas meters
• Portable devices