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TI SN74LVC10ADR product image
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TI SN74LVC10ADRRoHS

Manufacturer
TI
MPN
SN74LVC10ADR
LCSC Part #
C2878730
Packaging
SOIC-14
Customer #
Key Attributes
Triple 3-Input Positive-NAND Gate
Datasheetpdf iconTI SN74LVC10ADR
In-Stock: 105
105 In stock, ships now
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QtyUnit PriceTotal Amount
5+$ 0.4642$ 2.32
1,000+$ 0.2016$ 201.60
2,500+$ 0.1957$ 489.25
5,000+$ 0.1929$ 964.50
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingSOIC-14
Features-
Input Logic Level - Low700mV~800mV
Operating Temperature-40℃~+125℃
Logic Family74LVC Series
Input Logic Level - High1.7V~2V
Output Logic Level - High2.25V
Quiescent Current(Iq)1uA
Voltage - Supply1.65V~3.6V
Number of Channels3;3
Current - Output High(IOH)24mA
Output Logic Level - Low800mV
Propagation Delay4.7ns@3.3V,50pF
Current - Output Low(IOL)24mA
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Additional Information

TypeDetails
Minimum5
Multiple5
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC10A performs the Boolean function Y = (A•B•C)(overline) or Y = A(overline) + B(overline) + C(overline) in positive logic. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

Features

AI Translation
  • Operates From 1.65 V to 3.6 V
  • Specified From -40℃ to 85℃ and -40℃ to 125℃
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.9 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3V, TA = 25℃
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3V, TA = 25℃
  • Latch-Up Performance Exceeds ±50 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)