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TI SN74AC534DWR

Producent
Nr części prod.
SN74AC534DWR
Nr LCSC
C2878463
Opak.
SOIC-20-300mil
Numer Klienta
Klucz. cechy
2V~6V 1 8 12ns SOIC-20-300mil Flip Flops RoHS
Karta KatalogowaTI SN74AC534DWR
Zgodność z RoHS1 dokumentów dostępnych
Gwarancja na każde zamówienie
100% Oryginalne · Zwrot lub Wymiana w ciągu 30 Dni

Specyfikacje Produktu

Wszystko
TypOpis
KategoriaIntegrated Circuits (ICs)/Logic/Flip Flops
ProducentTI
Opak.SOIC-20-300mil
Voltage - Supply2V~6V
Number of Bits per Element1
Output TypeTri-State
Operating Temperature-40℃~+85℃
Series74AC Series
Synchronous/Asynchronous-
Number of Elements8
Current - Output High(IOH)24mA
Current - Output Low(IOL)24mA
Setup Time6.5ns
Quiescent Current80uA
Hold Time1.5ns
Propagation Delay12ns
Trigger TypeRising Edge

Opis

Tłumaczenie AI

The SN74AC534 is an octal edge-triggered D-type flip-flop with 3-state outputs. These 8-channel edge-triggered D-type flip-flops feature 3-state outputs specifically designed to drive highly capacitive or relatively low-impedance loads. These devices are particularly suited for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive-going transition of the clock (CLK) input, the inverting Q outputs are set to the complement of the logic levels present at the data (D) inputs. The buffered output enable (OE) input can be used to place all eight outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and enhanced drive capability allow this device to drive bus lines without interface or pull-up components. The output enable does not affect the internal operation of the flip-flops; while the outputs are in the high-impedance state, old data can be retained or new data can be entered. To ensure the high-impedance state during power-up or power-down, OE should be connected to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Funkcje

Tłumaczenie AI
  • Operating voltage range: 2 V to 6 V VCC
  • Input voltage up to 6 V
  • Maximum tpd of 11 ns at 5 V
  • 3-state inverting outputs for direct bus driving
  • Full parallel load access supported

Zastosowania

Tłumaczenie AI
  • Buffer register
  • I/O port
  • Bidirectional bus driver
  • Working register