TI DIX4192TPFBRQ1

The DIX4192-Q1 is a highly integrated CMOS device designed for professional and broadcast digital audio systems. The DIX4192-Q1 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for functional block data and clock interconnection.

The DIR and DIT are compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT support sample rates up to 216kHz. The DIR lock range covers sample rates from 20kHz to 216kHz.

The DIX4192-Q1 is configured via on-chip control registers and data buffers, accessible through a 4-wire SPI port or a 2-wire I²C bus interface. Status registers provide access to various flag and error bits from different functional blocks. The device features an open-drain interrupt output pin supported by flexible interrupt reporting and masking options configurable through control registers. A master reset input pin is also provided for initialization by a host processor or supervisory function.

The DIX4192-Q1 requires a 3.3V supply for portions of the DIR, DIT, and line driver and receiver functions, along with a 1.8V core logic supply. A separate logic I/O supply supports operation from 1.65V to 3.6V, compatible with low-voltage logic interfaces commonly found on DSPs and programmable logic devices.

The DIX4192-Q1 is available in a lead-free TQFP-48 package.

• Automotive electronics applications, AEC-Q100 qualified with the following results:
  • Device temperature grade: DIX4192I-Q1: Grade 3 (−40°C to +85°C); DIX4192T-Q1: Grade 2 (−40°C to +105°C)
  • Device HBM ESD classification level 2
  • Device CDM ESD classification level C4B
• Digital audio interface transmitter (DIT):
  • Converts PCM/encoded data to S/PDIF data
  • Supports sample rates up to 216kHz
  • Differential line driver and CMOS buffered outputs
• Digital audio interface receiver (DIR):
  • Converts S/PDIF to stereo PCM/encoded data
  • PLL lock range covers sample rates from 20kHz to 216kHz
  • Four differential input line receivers with input multiplexer
  • Bypass multiplexer routes line driver output to line driver and buffer outputs
  • Auto-detects non-PCM audio streams (DTS CD/LD and IEC 61937 formats)
  • Audio CD Q-channel subcode decoding and data buffering
  • Low-jitter recovered clock output
• User-selectable serial host interface: 16-bit dimming control via SPI or I²C
• On-chip register and data buffer access, status registers and interrupt generation for flagging condition and error conditions, block-size data buffers for channel status and user data
• Two audio serial ports (Port A and Port B):
  • Synchronous serial interface for external signal processors, data converters, and logic
  • Master/slave mode operation at sample rates up to 216kHz
  • Supports left-justified, right-justified, and Philips I2S data formats
  • Supports audio data word lengths up to 24 bits
• Four general-purpose digital outputs:
  • Multi-function programmability via control registers
• Extended power-down support:
  • Unused functional blocks can be individually disabled
• Powered by 1.8V core and 3.3V I/O supplies
• Small TQFP-48 package, compatible with SRC4382 and SRC4392

• Automotive infotainment systems