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TI SN74AUP2G32DQERRoHS

Manufacturer
TI
MPN
SN74AUP2G32DQER
LCSC Part #
C2869458
Packaging
X2-SON-8(1x1.4)
Customer #
Key Attributes
LOW-POWER DUAL 2-INPUT POSITIVE-OR GATE
Datasheetpdf iconTI SN74AUP2G32DQER
In-Stock: 481
481 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 0.4137$ 0.41
10+$ 0.33$ 3.30
30+$ 0.293$ 8.79
100+$ 0.2479$ 24.79
500+$ 0.227$ 113.50
1,000+$ 0.2157$ 215.70
Standard Packaging5000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters
ManufacturerTI
PackagingX2-SON-8(1x1.4)
FeaturesLocal shutdown mode
Logic Family74AUP
Input Logic Level - Low700mV;900mV
Input Logic Level - High1.6V;2V
Operating Temperature-40℃~+85℃
Output Logic Level - High2.55V
Quiescent Current(Iq)900nA
Voltage - Supply800mV~3.6V
Number of Channels2;2
Current - Output High(IOH)4mA
Output Logic Level - Low450mV
Propagation Delay4.3ns@3.3V,15pF
Current - Output Low(IOL)4mA
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging5000
Sales UnitPiece

Introduction

AI Translation

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire V_CC range of 0.8 V to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity. The SN74AUP2G32 performs the Boolean function Y = A + B or Y = AB(overline) in positive logic. NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using I_0ff. The I_0ff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Features

AI Translation
  • Available in the Texas Instruments NanoStar Package
  • Low Static-Power Consumption (I_CC = 0.9 μA Maximum)
  • Low Dynamic-Power Consumption (C_pd = 4.3 pF Typ at 3.3 V)
  • Low Input Capacitance (C_i = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot < 10% of V_CC
  • I_off Supports Partial-Power-Down Mode Operation
  • Wide Operating V_CC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • t_pd = 4.3 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
  • 2000-V Human-Body Model (A114-B, Class II)
  • 1000-V Charged-Device Model (C101)