TI CD74HC75PWR

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E and 2E) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E and 2E) is LOW the output is not affected.

• True and Complementary Outputs
• Buffered Inputs and Outputs
• Fanout (Over Temperature Range) - Standard Outputs: 10 LSTTL Loads - Bus Driver Outputs: 15 LSTTL Loads
• Wide Operating Temperature Range: -55℃ to 125℃
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, II ≤ 1μA at VOL, VOH