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TI SN74AVC32T245NMJRRoHS

Manufacturer
MPN
SN74AVC32T245NMJR
LCSC Part #
C2864491
Packaging
BGA-96
Customer #
Key Attributes
32-bit dual-supply bus transceiver with configurable voltage conversion, level shifting, and three-state outputs
Datasheetpdf iconTI SN74AVC32T245NMJR
In-Stock: 35
35 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 4.6457$ 4.65
10+$ 4.0376$ 40.38
30+$ 3.676$ 110.28
100+$ 3.3096$ 330.96
500+$ 3.1409$ 1570.45
1,000+$ 3.0647$ 3064.70
Standard Packaging1000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingBGA-96
Data Rate380Mbps
Voltage - Supply1.2V~3.6V;1.2V~3.6V
Operating Temperature-40℃~+85℃
Output TypeTri-State
Channel TypeBidirectional
FeaturesPower-off protection;Output enable high-impedance
Number of Elements4
Number of Channels8

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging1000
Sales UnitPiece

Introduction

AI Translation

This 32-bit non-inverting bus transceiver uses two separate configurable power supply rails. The SN74AVC32T245 is optimized for operation with VCCA/VCCB set in the range of 1.4V to 3.6V. The device can operate with VCCA/VCCB as low as 1.2V. Port A is designed to track VCCA. VCCA accepts any supply voltage in the range of 1.2V to 3.6V. Port B is designed to track VCCB. VCCB accepts any supply voltage in the range of 1.2V to 3.6V, enabling universal low-voltage bidirectional translation between the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes in any combination. The SN74AVC32T245 is designed for asynchronous communication between data buses. Depending on the logic level at the direction control (DIR) input, the device transmits data from the A bus to the B bus, or from the B bus to the A bus. The output enable (OE) input can disable the outputs, effectively isolating the buses. The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and 4OE) are powered by VCCA. The device is fully specified for partial-power-down applications using Ioff. The Ioff circuit disables the outputs, preventing damaging backflow current through the device when it is powered down. The VCC isolation feature ensures that if either VCC is grounded, both ports are placed in a high-impedance state. To ensure a high-impedance state during power-up or power-down, OE should be connected to VCC through a pullup resistor; the minimum value of this resistor is determined by the current-sinking capability of the driver.

Features

AI Translation
  • Control input levels VIH/VIL referenced to VCCA voltage
  • VCC isolation feature – if any VCC input is tied to GND, both ports enter high-impedance state
  • Overvoltage-tolerant I/Os enable mixed-voltage data communication
  • Fully configurable dual-rail design supporting full supply voltage range of 1.2V to 3.6V on each port independently
  • Ioff supports partial power-down mode operation
  • I/Os tolerant up to 4.6V
  • Maximum data rates:
    • 380Mbps (1.8V to 3.3V level translation)
    • 200Mbps (below 1.8V to 3.3V level translation)
    • 200Mbps (translation to 2.5V or 1.8V)
    • 150Mbps (translation to 1.5V)
    • 100Mbps (translation to 1.2V)
  • Latch-up performance exceeds 100mA per JESD 78 Class II
  • ESD protection exceeds JESD 22 specifications

Applications

AI Translation
  • Consumer Electronics
  • Industrial
  • Enterprise Telecommunications