TI CD4024BNSR

CD4020B, CD4024B, and CD4040B are ripple-carry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.

• Medium-speed operation
• Fully static operation
• Buffered inputs and outputs
• 100% tested for quiescent current at 20x
• Standardized, symmetrical output characteristics
• Common reset
• 5-V, 10-V, and 15-V parametric ratings
• Maximum input current of ±1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25℃
• Noise margin (over full package-temperature range): 1 V at VDD = 5 V; 2 V at VDD = 10 V; 2.5 V at VDD = 15 V
• Meets all requirements of JEDEC Tentative Standard No. 138, "Standard Specifications for Description of 'B' Series CMOS Devices"

• Control counters
• Frequency dividers
• Time-delay circuits