TI SN74AVCAH164245GR

This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE(overline)) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, and 2OE(overline)) are supplied by VCCA. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE(overline) should be tied to VCCA through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using |loff|. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND, then both ports are in the high-impedance state.

• Member of the Texas Instruments Widebus Family
• DOC Circuitry Dynamically Changes Output Impedance, Resulting in Noise Reduction Without Speed Degradation
• Dynamic Drive Capability Is Equivalent to Standard Outputs With IoH and IoL of ±24 mA at 2.5~VCC
• Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
• If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
• Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
• Ioff Supports Partial-Power-Down Mode Operation
• Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)