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TI UCC27531DRRoHS

Manufacturer
MPN
UCC27531DR
LCSC Part #
C2677154
Packaging
SOIC-8
Customer #
Key Attributes
2.5A and 5A low-cost gate drivers
Datasheetpdf iconTI UCC27531DR
In-Stock: 110
110 In stock, ships now
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 1.3485$ 1.35
10+$ 1.1148$ 11.15
30+$ 0.9866$ 29.60
100+$ 0.8406$ 84.06
500+$ 0.7757$ 387.85
1,000+$ 0.7481$ 748.10
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Power Management (PMIC)/Gate Drivers
ManufacturerTI
PackagingSOIC-8
Input Logic Level - Low800mV~1.2V
Low Level Delay Time17ns
High Level Delay Time17ns
Quiescent Current-
Input Logic Level - High1.8V~2.2V
Operating Temperature-40℃~+140℃
Voltage - Supply10V~35V
Driven ConfigurationLow Side
Current - Output Low(IOL)5A
Rise Time15ns
Fall Time10ns
FeaturesUnder Voltage Protection;Enable shutdown
Current - Output High(IOH)2.5A
Load TypeMOSFET;IGBT

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

Low-cost gate driver (optimal solution for driving FETs and IGBTs) Excellent replacement for discrete transistor pair drivers (simplified interface with controllers) The UCC2753x single-channel high-speed gate driver effectively drives MOSFET and IGBT power switches. The UCC2753x devices employ a design that delivers up to 2.5A and 5A sink current through asymmetric drive (split output), combined with support for negative turn-off bias voltage, rail-to-rail drive capability, and ultra-low propagation delay (typically 17ns), making them an ideal solution for MOSFET and IGBT power switches. The UCC2753x family also supports enable, dual-input, and inverting/non-inverting input functions. The isolated output and robust asymmetric drive improve device immunity to parasitic Miller effect and help reduce ground bounce. No negative bias voltage required to drive IGBTs Leaving input pins open will hold the driver output low. The logic behavior of the driver is shown in the application diagrams, timing diagrams, and input/output logic truth tables. The internal circuitry on the VDD pin provides an UVLO function that holds the output low until the VDD supply voltage is within the operating range.

Features

AI Translation
  • Low-cost gate driver
  • Excellent discrete transistor pair replacement
  • TTL and CMOS compatible input logic thresholds (independent of supply voltage)
  • Split output option for independent source and sink current adjustment
  • Inverting and non-inverting input configurations
  • Enable via fixed TTL-compatible threshold
  • Up to 2.5A peak source and 2.5A or 5A peak sink drive current at 18V VDD
  • Wide VDD range: 10V to 35V
  • Input and enable pins withstand DC voltages below ground up to –5V
  • Output held low when input is floating or during VDD UVLO
  • Fast propagation delay (17ns typical)
  • Fast rise and fall times (15ns and 7ns typical with 1800pF load)
  • Under-voltage lockout (UVLO)
  • High-side or low-side driver capability (with appropriate bias and signal isolation design)
  • Low-cost, space-saving 5-pin or 6-pin DBV (SOT-23) package options
  • Pin-to-pin compatible between UCC27536/UCC27537 and TPS2828/TPS2829
  • Operating temperature range: -40℃ to 140℃

Applications

AI Translation
  • Switching mode power supplies
  • DC/DC converters
  • Photovoltaic inverters
  • Motor control
  • UPS
  • HEV and EV chargers
  • Home appliances
  • Renewable energy power conversion
  • SiC FET converters