TI UCC27519DBVT

The UCC27518 and UCC27519 single-channel high-speed low-side gate driver devices effectively drive MOSFET and IGBT power switches. The UCC27518 and UCC27519 are designed to minimize shoot-through current, delivering high peak source/sink current pulses to capacitive loads while providing rail-to-rail drive capability and ultra-short propagation delay (17ns typical). At VDD = 12V, the UCC27518 and UCC27519 provide sink/source (symmetrical drive) current drive capability with a peak of 4A. The UCC27518 and UCC27519 feature a wide VDD range of 4.5V to 18V and a wide temperature range of -40°C to 140°C. When the VDD operating range is exceeded, an internal UVLO circuit on the VDD pin holds the output low. These devices not only operate at low voltages below 5V but also offer best-in-class switching characteristics, making them ideal for driving emerging wide-bandgap power switch devices such as GaN power semiconductors. The input pin thresholds of the UCC27518 and UCC27519 are based on CMOS logic, where the threshold voltage is a function of the VDD supply voltage. The typical input threshold high (VIN-H) is 55% of VDD, and the typical input threshold low (VIN-L) is 39% of VDD. The wide hysteresis between the upper and lower thresholds (typically 16% of VDD) provides excellent noise immunity and allows users to introduce delay by placing an RC circuit between the input PWM signal and the device's INx pin. The UCC27518 and UCC27519 also feature a floating-capable enable function on the EN pin. Leaving the EN pin unconnected enables pin compatibility between the UCC27518/UCC27519 and the TPS2828/TPS2829, respectively. The EN pin voltage threshold is fixed and does not vary with the VDD pin bias voltage. The typical enable threshold high (VEN-H) is 2.1V, and the typical enable threshold low (VEN-L) is 1.25V.

• Low-cost gate driver, superior alternative to NPN and PNP discrete solutions
• Pin-compatible with TI's TPS2828 and TPS2829 devices
• Symmetric 4A peak source and 4A peak sink drive
• Fast propagation delay (17ns typical)
• Fast rise and fall times (8ns and 7ns typical)
• 4.5V to 18V single-supply range
• Output held low during VDD UVLO (ensures glitch-free operation during power-up and power-down)
• CMOS input logic threshold (function of supply voltage with hysteresis)
• Hysteretic logic threshold for high noise immunity
• EN pin for enable function (can be left unconnected)
• Output held low when input pin is floating
• Input pin absolute maximum voltage level independent of VDD pin bias supply voltage
• Operating temperature range: -40°C to 140°C
• 5-pin DBV package (SOT-23)

• Switched-mode power supplies
• DC-DC converters
• Companion gate driver devices for digital power controllers
• Solar, motor control, UPS
• Gate drivers for emerging wide bandgap power devices (e.g., GaN)