TI SN74LV245ATDWR

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The SN74LV245AT allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable overline{OE} input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, overline{OE} should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff . The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

• Inputs Are TTL-Voltage Compatible
• 4.5-V to 5.5-V Vcc Operation
• Typical tpd of 3.5 ns at 5 V
• Typical Volp (Output Ground Bounce) < 0.8 V at Vcc = 5 V, TA = 25℃
• Typical Vohv (Output Voh Undershoot) > 2.3 V at Vcc = 5 V, TA = 25℃
• Supports Mixed-Mode Voltage Operation on All Ports
• Ioff Supports Partial-Power-Down Mode Operation
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) 1000-V Charged-Device Model (C101)