STC Micro STC15L408AD-28I-LQFP32

The STC15F2K60S2 series features ultra-strong anti-interference capability and unbreakable encryption using STC's 8th-generation encryption technology. No external crystal oscillator or external reset is required, and the external EEPROM can be eliminated via IAP technology. It supports ISP/IAP in-system programming without a programmer or emulator, and offers 2K-byte SRAM, dual UARTs, a high-speed 10-bit ADC (8 channels), and a 1-clock/machine-cycle 8051 core — delivering high speed, high reliability, ultra-low power consumption, ultra-low cost, superior ESD protection, and ultra-strong anti-interference performance.

The STC15W408AS series MCU features high speed at 1 clock/machine cycle with an enhanced 8051 core — 7–12× faster than conventional 8051 and 20% faster than STC's earlier 1T series. Wide operating voltage: 2.4V–5.5V. Low-power design with slow, idle, and power-down modes. No external reset or crystal oscillator required; internal clock selectable from 5MHz to 35MHz with high-precision internal R/C oscillator (±0.3% accuracy), ±1% temperature drift (−40°C to +85°C), and ±0.6% at normal temperature (−20°C to +65°C). Supports multiple power-down wake-up sources. On-chip Flash: 4K/8K/13K/15.5K bytes with large on-chip EEPROM, rated for 100,000+ erase/write cycles. Supports ISP/IAP. High-speed 8-channel 10-bit ADC at up to 300,000 samples/second; 3-channel PWM usable as 3-channel DAC. Built-in comparator; 3-channel capture/compare unit; 5 timers; programmable clock output; hardware watchdog; high-speed UART switchable as 3 independent serial ports via time-division multiplexing; SPI high-speed synchronous serial interface. Advanced instruction set architecture compatible with standard 8051, with hardware multiply/divide instructions. 26/18/14 general-purpose I/O pins configurable in four modes, each capable of 20mA drive current, with a chip-wide maximum of 120mA.

The STC15F101W series is a new-generation 1T 8051 MCU offering high speed, high reliability, and ultra-low cost, with no external crystal oscillator or reset required, using Macrocrystal's 8th-generation encryption technology. High speed at 1 clock/machine cycle with an enhanced 8051 core — 6–12× faster than conventional 8051 and 20% faster than STC's earlier 1T series. Wide operating voltage: 5.5–3.8V, or 2.4–3.6V (STC15L101W series). Low-power design with slow, idle, and power-down modes. Supports multiple power-down wake-up sources. On-chip Flash: 1K/2K/3K/4K/5K/7K bytes with on-chip EEPROM, rated for 100,000+ erase/write cycles. Supports ISP/IAP. Two 16-bit auto-reload timers T0/T2 with clock output capability; programmable clock output; hardware watchdog. UART functionality implementable via [P3.0/INT4, P3.1] combined with a timer. Advanced instruction set architecture compatible with standard 8051, with hardware multiply/divide instructions. 8 general-purpose I/O pins configurable in four modes, each capable of 20mA drive current, with a chip-wide maximum of 90mA.

• Ultra-strong anti-interference, unbreakable encryption
• STC 8th or 9th generation encryption technology
• No external crystal oscillator or external reset required
• External EEPROM eliminated via IAP technology
• ISP/IAP in-system programming, no programmer/emulator required
• Large 2K-byte SRAM
• Dual UART, two independent serial ports
• High-speed 10-bit ADC, 8 channels
• 1 clock/machine cycle 8051
• High-speed, high-reliability
• Ultra-low power consumption, ultra-low cost
• Ultra-strong ESD protection
• 512-byte on-chip RAM data memory
• 7–12× faster than traditional 8051, 20% faster than STC early 1T series MCUs
• Wide voltage range: 2.4V–5.5V (STC15W408AS series); 5.5–3.8V, 2.4–3.6V (STC15L101W series)
• Low-power design: slow-speed mode, idle mode, power-down mode (wake-up via external interrupt or internal power-down wake-up timer)
• 16-level (STC15W408AS series) or 8-level (STC15F101W series) selectable reset threshold voltage during ISP programming, with built-in high-reliability reset circuit
• Internal clock selectable from 5MHz–35MHz; internal high-precision R/C oscillator (±0.3%), temperature drift ±1% (−40°C–+85°C), typical temperature drift ±0.6% (−20°C–+65°C)
• Multiple power-down wake-up sources supported
• 4K/8K/13K/15.5K-byte (STC15W408AS series) or 1K/2K/3K/4K/5K/7K-byte (STC15F101W series) on-chip Flash program memory, endurance >100,000 erase/write cycles
• Large on-chip EEPROM, endurance >100,000 erase/write cycles
• High-speed ADC: 8-channel 10-bit, up to 300,000 conversions/sec; 3-channel PWM usable as 3-channel DAC
• Comparator: supports comparison between external pin CMP+ and external pin CMP−, capable of generating interrupts and output on pin CMPO (configurable polarity); also supports comparison between external pin CMP+ and internal reference voltage
• 3-channel capture/compare unit (CCP/PCA/PWM) — also configurable as 3-channel DAC, 3 timers, or 3 external interrupts (rising/falling edge interrupt support)
• 5 timers: two 16-bit auto-reload timers/counters (T0/T2, with T0 compatible with standard 8051 timer/counter), both supporting programmable clock output; pin MCLKO supports divided internal master clock output (÷1, ÷2, or ÷4)
• Programmable clock output (clock division output from internal system clock or external pin clock input)
• Hardware watchdog timer (WDT)
• Ultra-high-speed asynchronous UART, time-division multiplexed as 3 independent serial ports
• SPI high-speed synchronous serial communication interface
• Advanced instruction set architecture, compatible with standard 8051 instruction set, with hardware multiply/divide instructions
• General-purpose I/O: 26/18/14 pins (STC15W408AS series) or 8 pins (STC15F101W series); quasi-bidirectional/weak pull-up after reset (standard 8051-style I/O), configurable in four modes: quasi-bidirectional/weak pull-up, push-pull/strong pull-up, input-only/high-impedance, open-drain; each I/O pin drive capability up to 20mA, with total chip current not exceeding 120mA (STC15W408AS series) or 90mA (STC15F101W series)