TI ADS5294IPFPR

The ADS5294 is a low-power 80MSPS 8-channel ADC utilizing CMOS process technology and innovative circuit techniques. Low power consumption, high SNR, low SFDR, and consistent overload recovery capability enable users to design high-performance systems. The digital processing block of the ADS5294 integrates several commonly used digital functions to enhance system performance. The device includes a digital filter module with built-in decimation filters (featuring low-pass, high-pass, and band-pass characteristics). The decimation rate is also programmable (2x, 4x, or 8x). This decimation rate is particularly useful for narrowband applications, where the filter can improve SNR, eliminate harmonics, and reduce the output data rate. The device includes an averaging mode, in which two channels (or even four channels) can be averaged to improve SNR.

• Maximum sampling rate: 80MSPS/14-bit
• High SNR
• SNR of 75.5dBFS at 5MHz/80MSPS
• SNR of 78.2dBFS at 5MHz/80MSPS with decimation filter enabled
• SFDR of 84dBc at 5MHz/80MSPS
• Low power consumption
• 58mW per channel at 50MSPS
• 77mW per channel at 80MSPS (2 LVDS lanes per channel)
• Digital processing block
• Programmable FIR decimation filter and oversampling to minimize harmonic interference
• Programmable IIR high-pass filter to minimize DC offset
• Programmable digital gain: 0dB to 12dB
• 2-channel or 4-channel averaging
• Flexible serial LVDS output:
• One or two LVDS output lanes per channel (depending on ADC sampling rate)
• Programmable mapping between ADC input channels and LVDS output pins — simplifies board design
• Multiple test modes to verify FPGA/receiver data capture
• Internal and external reference
• 1.8V operation for low power consumption
• Low-frequency noise suppression
• Recovery from 6dB overload within 1 clock cycle
• Package: 80-pin QFP, 12mm x 12mm

• Ultrasonic and sonar imaging
• Communication applications
• Multi-channel data acquisition