Cirrus Logic CS2300CP-CZZR

The CS2300-CP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. It is based on a hybrid analog-digital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for generation of a low-jitter clock relative to an external noisy synchronization clock at frequencies as low as 50 Hz. The CS2300-CP supports both I²C and SPI for full software control.

• Clock Multiplier / Jitter Reduction Generates a Low Jitter 6 - 75 MHz Clock from a Jittery or Intermittent 50 Hz to 30 MHz Clock Source
• Internal LC Oscillator for Timing Reference
• Highly Accurate PLL Multiplication Factor Maximum Error less than 1 PPM in HighResolution Mode
• I²C / SPI Control Port
• Configurable Auxiliary Output
• Minimal Board Space Required No External Analog Loop-filter Components

• Timing Reference Clock
• Frequency Reference Clock Input, CLK_IN
• Output to Input Frequency Ratio Configuration
• PLL Clock Output
• Auxiliary Output
• Clock Output Stability Considerations
• Required Power Up Sequencing