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MICROCHIP PIC24F32KA304-I/PT
| Manufacturer | |
| MPN | PIC24F32KA304-I/PT |
| LCSC Part # | C219267 |
| Packaging | TQFP-44(10x10) |
| Customer # | |
| Key Attributes | General Purpose, 16-Bit Flash Microcontrollers with XLP Technology |
| Datasheet |  MICROCHIP PIC24F32KA304-I/PT |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | TQFP-44(10x10) | |
| ADC (Bit) | 12bit | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 1.8V~3.6V | |
| Program Memory Type | FLASH | |
| EEPROM | 512Byte | |
| Program Storage Size | 32KB | |
| CPU Core | PIC | |
| Core Size | 16 Bit | |
| CPU Maximum Speed | 32MHz | |
| Oscillator Type | Built-in | |
| Number of I/O | 39 |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 160 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- Run – CPU, Flash, SRAM and Peripherals On
- Doze – CPU Clock Runs Slower than Peripherals
- Idle – CPU Off, Flash, SRAM and Peripherals On
- Sleep – CPU, Flash and Peripherals Off, and SRAM On
- Deep Sleep – CPU, Flash, SRAM and Most Peripherals Off; Multiple Autonomous Wake-up Sources
- Low-Power Consumption: Run mode currents down to 8 μA, typical; Idle mode currents down to 2.2 μA, typical; Deep Sleep mode currents down to 20 nA, typical; Real-Time Clock/Calendar currents down to 700 nA, 32 kHz, 1.8V; Watchdog Timer is 500 nA, 1.8V typical
- Modified Harvard Architecture
- Up to 16 MIPS Operation @32 MHz
- 8 MHz Internal Oscillator with 4x PLL Option and Multiple Divide Options
- 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
- 32-Bit by 16-Bit Hardware Divider, 16-Bit x 16-Bit Working Register Array
- C Compiler Optimized Instruction Set Architecture
- Hardware Real-Time Clock and Calendar (RTCC): Provides clock, calendar and alarm functions; Can run in Deep Sleep mode; Can use 50/60 Hz power line input as clock source
- Programmable 32-Bit Cyclic Redundancy Check (CRC)
- Multiple Serial Communication modules: Two 3/4 -wire SPI modules; Two I²C modules with multi-master/slave support; Two UART modules, supporting RS-485, RS-232, LIN/J2602
- Five 16-Bit Timers/Counters with Programmable Prescaler: Can be paired as 32-bit timers/counters
- Three 16-Bit Capture Inputs with Dedicated Timers
- Three 16-Bit Compare/PWM Outputs with Dedicated Timers
- Configurable Open-Drain Outputs on Digital I/O Pins
- Up to Three External Interrupt Sources
- 12-Bit, Up to 16-Channel Analog-to-Digital Converter: 100 ksps conversion rate; Conversion available during Sleep and Idle; Auto-sampling, timer-based option for Sleep and Idle modes; Wake on auto-compare option
- Dual Rail-to-Rail Analog Comparators with Programmable Input/Output Configuration
- On-Chip Voltage Reference
- Internal Temperature Sensor
- Charge Time Measurement Unit (CTMU): Used for capacitance sensing, 16 channels; Time measurement, down to 200 ps resolution; Delay/pulse generation, down to 1 ns resolution
- Wide Operating Voltage Range: 1.8V to 3.6V (PIC24F devices); 2.0V to 5.5V (PIC24FV devices)
- Low-Power Wake-up Sources and Supervisors: Ultra Low-Power Wake-up (ULPWU) for Sleep/Deep Sleep; Low-Power Watchdog Timer (DSWDT) for Deep Sleep; Extreme Low-Power Brown-out Reset (DSBOR) for Deep Sleep, LPBOR for all other modes
- System Frequency Range Declaration bits: Declaring the frequency range optimizes the current consumption.
- Standard Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for Reliable Operation
- Programmable High/Low-Voltage Detect (HLVD)
- Standard Brown-out Reset (BOR) with 3 Programmable Trip Points that can be Disabled in Sleep
- High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
- Flash Program Memory: Erase/write cycles: 10,000 minimum; 40 years’ data retention minimum
- Data EEPROM: Erase/write cycles: 100,000 minimum; 40 years’ data retention minimum
- Fail-Safe Clock Monitor (FSCM)
- Programmable Reference Clock Output
- Self-Programmable under Software Control
- In-Circuit Serial Programming (ICSP) and In-Circuit Debug (ICD) via 2 Pins
In-Stock: 62
62 In stock, ships now
Add to BOM List
| Qty | Unit Price | Total Amount |
|---|---|---|
| 1+ | $ 5.864 | $ 5.86 |
| 10+ | $ 5.5825 | $ 55.83 |
| 30+ | $ 5.41 | $ 162.30 |
| 100+ | $ 5.2667 | $ 526.67 |
Standard Packaging160/Full Tray | ||
Better price for more quantity?
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Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Embedded/Microcontrollers | |
| Manufacturer | MICROCHIP | |
| Packaging | TQFP-44(10x10) | |
| ADC (Bit) | 12bit | |
| Operating Temperature | -40℃~+85℃ | |
| Voltage - Supply | 1.8V~3.6V | |
| Program Memory Type | FLASH | |
| EEPROM | 512Byte | |
| Program Storage Size | 32KB | |
| CPU Core | PIC | |
| Core Size | 16 Bit | |
| CPU Maximum Speed | 32MHz | |
| Oscillator Type | Built-in | |
| Number of I/O | 39 |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 160 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Features
AI Translation
- Run – CPU, Flash, SRAM and Peripherals On
- Doze – CPU Clock Runs Slower than Peripherals
- Idle – CPU Off, Flash, SRAM and Peripherals On
- Sleep – CPU, Flash and Peripherals Off, and SRAM On
- Deep Sleep – CPU, Flash, SRAM and Most Peripherals Off; Multiple Autonomous Wake-up Sources
- Low-Power Consumption: Run mode currents down to 8 μA, typical; Idle mode currents down to 2.2 μA, typical; Deep Sleep mode currents down to 20 nA, typical; Real-Time Clock/Calendar currents down to 700 nA, 32 kHz, 1.8V; Watchdog Timer is 500 nA, 1.8V typical
- Modified Harvard Architecture
- Up to 16 MIPS Operation @32 MHz
- 8 MHz Internal Oscillator with 4x PLL Option and Multiple Divide Options
- 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
- 32-Bit by 16-Bit Hardware Divider, 16-Bit x 16-Bit Working Register Array
- C Compiler Optimized Instruction Set Architecture
- Hardware Real-Time Clock and Calendar (RTCC): Provides clock, calendar and alarm functions; Can run in Deep Sleep mode; Can use 50/60 Hz power line input as clock source
- Programmable 32-Bit Cyclic Redundancy Check (CRC)
- Multiple Serial Communication modules: Two 3/4 -wire SPI modules; Two I²C modules with multi-master/slave support; Two UART modules, supporting RS-485, RS-232, LIN/J2602
- Five 16-Bit Timers/Counters with Programmable Prescaler: Can be paired as 32-bit timers/counters
- Three 16-Bit Capture Inputs with Dedicated Timers
- Three 16-Bit Compare/PWM Outputs with Dedicated Timers
- Configurable Open-Drain Outputs on Digital I/O Pins
- Up to Three External Interrupt Sources
- 12-Bit, Up to 16-Channel Analog-to-Digital Converter: 100 ksps conversion rate; Conversion available during Sleep and Idle; Auto-sampling, timer-based option for Sleep and Idle modes; Wake on auto-compare option
- Dual Rail-to-Rail Analog Comparators with Programmable Input/Output Configuration
- On-Chip Voltage Reference
- Internal Temperature Sensor
- Charge Time Measurement Unit (CTMU): Used for capacitance sensing, 16 channels; Time measurement, down to 200 ps resolution; Delay/pulse generation, down to 1 ns resolution
- Wide Operating Voltage Range: 1.8V to 3.6V (PIC24F devices); 2.0V to 5.5V (PIC24FV devices)
- Low-Power Wake-up Sources and Supervisors: Ultra Low-Power Wake-up (ULPWU) for Sleep/Deep Sleep; Low-Power Watchdog Timer (DSWDT) for Deep Sleep; Extreme Low-Power Brown-out Reset (DSBOR) for Deep Sleep, LPBOR for all other modes
- System Frequency Range Declaration bits: Declaring the frequency range optimizes the current consumption.
- Standard Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for Reliable Operation
- Programmable High/Low-Voltage Detect (HLVD)
- Standard Brown-out Reset (BOR) with 3 Programmable Trip Points that can be Disabled in Sleep
- High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
- Flash Program Memory: Erase/write cycles: 10,000 minimum; 40 years’ data retention minimum
- Data EEPROM: Erase/write cycles: 100,000 minimum; 40 years’ data retention minimum
- Fail-Safe Clock Monitor (FSCM)
- Programmable Reference Clock Output
- Self-Programmable under Software Control
- In-Circuit Serial Programming (ICSP) and In-Circuit Debug (ICD) via 2 Pins
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | 3A991A2 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Type | Details |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |