TI MSP430F2013QRSATEP

The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand. The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to-register operation execution time is one cycle of the CPU clock. Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register, and constant generator respectively. The remaining registers are general-purpose registers. Peripherals are connected to the CPU using data, address, and control buses, and can be handled with all instructions.

• Supply voltage range: 1.8 V to 3.6 V
• Ultra-low power consumption
• Active mode: 220μA (at 1MHz, 2.2V)
• Standby mode: 0.5μA
• Off mode (RAM retention): 0.1μA
• 5 power-saving modes
• Ultra-fast wake-up from standby in less than 1μs
• Basic clock module: internal frequency up to 16 MHz with 4 calibrated frequencies within ±1% tolerance
• Internal ultra-low-power low-frequency oscillator
• 32-kHz crystal
• External digital clock source
• 16-bit Timer_A with two capture/compare registers
• 16-bit Sigma-Delta A/D converter with differential PGA input and internal reference
• Supply voltage supervisor
• Serial on-board programming, no external programming voltage required; programmable code protected by Security Fuse
• On-chip emulation logic with Spy-Bi-Wire interface
• 2KB + 256B Flash; 128B RAM
• 16-pin QFN package
• Controlled baseline
• Single assembly/test site
• Single manufacturing site
• Extended temperature range operation (-40°C/125°C)
• Extended product life cycle
• Enhanced product change notification
• Product traceability

• Sensor Systems
• Standalone RF Sensor Front-End