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micron MT29F4G01ABBFDWB-IT:FRoHS

Manufacturer
micron
MPN
MT29F4G01ABBFDWB-IT:F
LCSC Part #
C20511638
Packaging
UPDFN-8(8x6)
Customer #
Key Attributes
1.7V~1.95V 4Gbit 83MHz SPI UPDFN-8(8x6) Memory (ICs) RoHS
Datasheetpdf iconmicron MT29F4G01ABBFDWB-IT:F
In-Stock: 6
6 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 5.5544$ 5.55
10+$ 5.4236$ 54.24
30+$ 5.3347$ 160.04
100+$ 5.2475$ 524.75
Standard Packaging2000/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory (ICs)
Manufacturermicron
PackagingUPDFN-8(8x6)
Voltage - Supply1.7V~1.95V
Memory Size4Gbit
Operating temperature-40℃~+85℃
Program / Erase Cycles100,000 cycles
Clock Frequency83MHz
FeaturesRead buffer function;Write enable latch;Hardware reset function;Software write protection function;Hardware write protection function;ECC error correction function;OTP region write protection and lock function
Data Retention - TDR (Year)-
Block Erase Time(tBE)2ms
Write Cycle Time(tWC)-
Page Programming Time (Tpp)-
Standby Supply Current-
InterfaceSPI
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Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2000
Sales UnitPiece

Introduction

AI Translation

SPI NAND Flash using single-level cell technology, offering 4Gb density. Supports standard and extended SPI-compatible serial bus interfaces. Internal ECC enabled by default; user-selectable internal ECC with 8-bit per sector support. Features software write protection, hardware write protection, OTP space, and permanent block lock protection. Advanced features include page cache read mode and read ID. Automatic device initialization on power-up. Operating voltage range: 1.7V to 1.95V; industrial operating temperature range: -40°C to +85°C.

Features

AI Translation
  • Single-level cell technology, 4Gb density
  • Organization: page size 4352 bytes, block size 64 pages, plane size 2048 blocks
  • Supports standard and extended SPI-compatible serial bus interface; commands and addresses on 1 pin, data output on 1, 2, or 4 pins
  • Supports commands on 1 pin, address and data output on 2 or 4 pins
  • Supports commands and addresses on 1 pin, data input on 1 or 4 pins
  • Supports continuous read within a block; enabled by default or configurable via feature register
  • Internal ECC enabled by default; supports user-selectable internal ECC, 8 bits per sector
  • Maximum clock frequency 83MHz
  • Page read time: 25µs max with on-die ECC disabled; 135µs max with on-die ECC enabled
  • Page program time: 200µs typical with on-die ECC disabled; 240µs typical with on-die ECC enabled
  • Block erase time: 2ms typical
  • Supports read page cache mode and read ID
  • Automatic device initialization on power-up
  • Software write protection, hardware write protection, OTP space, and permanent block lock protection
  • Endurance: 100K program/erase cycles
  • Data retention: compliant with JESD47H; uncycled data retention: 10 years at 85°C