micron MT41K512M8RH-107:E
| Manufacturer | |
| MPN | MT41K512M8RH-107:E |
| LCSC Part # | C20504727 |
| Packaging | 78-FBGA (9x10.5) |
| Customer # | |
| Key Attributes | 1.283V~1.45V 4Gbit 933MHz DDR3L SDRAM 78-FBGA (9x10.5) Memory (ICs) RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | micron | |
| Packaging | 78-FBGA (9x10.5) | |
| Voltage - Supply | 1.283V~1.45V | |
| Memory Size | 4Gbit | |
| Operating temperature | 0℃~+95℃ | |
| Clock Frequency | 933MHz | |
| Features | Auto self-refresh;Auto precharge function;Asynchronous reset function;Data mask function;Dynamic on-chip termination;ZQ calibration function;Write leveling function | |
| Memory Format | DDR3L SDRAM |
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Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
AI Translation
DDR3L SDRAM (1.35V) is a low voltage version of the DDR3 (1.5V) SDRAM. Refer to DDR3 (1.5V) SDRAM (Die Rev :E) data sheet specifications when running in 1.5V compatible mode.
Features
AI Translation
- VDD = VDDQ = 1.35V (1.283–1.45V)
- Backward compatible to VDD = VDDQ = 1.5V ± 0.075V – Supports DDR3L devices to be backward compatible in 1.5V applications
- Differential bidirectional data strobe
- 8n-bit prefetch architecture
- Differential clock inputs (CK, CK#)
- 8 internal banks
- Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
- Programmable CAS (READ) latency (CL)
- Programmable posted CAS additive latency (AL)
- Programmable CAS (WRITE) latency (CWL)
- Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
- Selectable BC4 or BL8 on-the-fly (OTF)
- Self refresh mode
- TC of 105℃ – 64ms, 8192-cycle refresh up to 85℃; 32ms, 8192-cycle refresh at > 85℃ to 95℃; 16ms, 8192-cycle refresh at > 95℃ to 105℃
- Self refresh temperature (SRT)
- Automatic self refresh (ASR)
- Write leveling
- Multipurpose register
- Output driver calibration
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 15.7124 | $ 15.71 |
| 200+ | $ 6.2698 | $ 1253.96 |
| 500+ | $ 6.0602 | $ 3030.10 |
| 1,000+ | $ 5.9569 | $ 5956.90 |
Standard Packaging1000/Full Bag | ||
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Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | micron | |
| Packaging | 78-FBGA (9x10.5) | |
| Voltage - Supply | 1.283V~1.45V | |
| Memory Size | 4Gbit | |
| Operating temperature | 0℃~+95℃ | |
| Clock Frequency | 933MHz | |
| Features | Auto self-refresh;Auto precharge function;Asynchronous reset function;Data mask function;Dynamic on-chip termination;ZQ calibration function;Write leveling function | |
| Memory Format | DDR3L SDRAM |
Report an ErrorShow similar products (0) >
Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 1000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
AI Translation
DDR3L SDRAM (1.35V) is a low voltage version of the DDR3 (1.5V) SDRAM. Refer to DDR3 (1.5V) SDRAM (Die Rev :E) data sheet specifications when running in 1.5V compatible mode.
Features
AI Translation
- VDD = VDDQ = 1.35V (1.283–1.45V)
- Backward compatible to VDD = VDDQ = 1.5V ± 0.075V – Supports DDR3L devices to be backward compatible in 1.5V applications
- Differential bidirectional data strobe
- 8n-bit prefetch architecture
- Differential clock inputs (CK, CK#)
- 8 internal banks
- Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
- Programmable CAS (READ) latency (CL)
- Programmable posted CAS additive latency (AL)
- Programmable CAS (WRITE) latency (CWL)
- Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])
- Selectable BC4 or BL8 on-the-fly (OTF)
- Self refresh mode
- TC of 105℃ – 64ms, 8192-cycle refresh up to 85℃; 32ms, 8192-cycle refresh at > 85℃ to 95℃; 16ms, 8192-cycle refresh at > 95℃ to 105℃
- Self refresh temperature (SRT)
- Automatic self refresh (ASR)
- Write leveling
- Multipurpose register
- Output driver calibration
Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |

