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XTX XT27G02BTSIGA product image
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XTX XT27G02BTSIGA

Manufacturer
XTXAsian Brands
MPN
XT27G02BTSIGA
LCSC Part #
C20417424
Packaging
TSOP-48
Customer #
Key Attributes
Parallel SLC-NAND
DatasheetXTX XT27G02BTSIGA
RoHS Compliance1 documents available
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement
In-Stock: 853
853 In stock, ships now
Minimum: 1Multiple: 1Sales Unit: Piece
Add to BOM List
QtyUnit PriceTotal Amount
1+$ 14.1089$ 11.2872$ 11.29
10+$ 13.9175$ 11.1340$ 111.34
30+$ 13.585$ 10.8680$ 326.04
96+$ 13.2963$ 10.6371$ 1021.16
Standard Packaging96/Full Tray
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Memory/Memory
ManufacturerXTX
PackagingTSOP-48
Operating Temperature-40℃~+85℃
FeaturesHardware write protection function;Built-in error correction code (ECC) function
Memory Size2Gbit
Voltage - Supply2.7V~3.6V;30mA
Clock Frequency-
Access Time20ns
Data Retention - TDR (Year)10 years
Write Cycle Time(tWC)300us
Standby Supply Current50uA
Write Cycle Endurance-
Interface-

Introduction

AI Translation

The XT27G02B is a single 3.3v 2Gbit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (2048+64) bytes x 64 pages x 2048 blocks. The device has two 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes + 4 Kbytes: 2112 bytes x 64 pages). The XT27G02B is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. The XT27G02B has ECC logic on the chip and 8bit read errors for each 528Bytes can be corrected internally.

Features

AI Translation
  • Single Level per Cell (SLC) Technology
  • ECC requirement: 0bit/528Bytes, with build-in ECC controller to implement 8 bit/528Bytes internally
  • Power Supply Voltage Voltage range: 2.7V ~ 3.6V
  • Organization Page size: x8 (2048 + 64) bytes; 64 - bytes spare area Block size: x8 (128k + 4k) bytes Plane size: 1024 Blocks per Plane 2008 block (min) ~ 2048 block (max)
  • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read, ECC Status Read
  • Access time Cell array to register: 25μs (max) Serial Read Cycle: 25 ns (min) (CL = 50pF)
  • Program/Erase time Auto Page Program: 300 µs /page (typ.) Auto Block Erase: 3.5 ms/block( typ.)
  • Reliability 10 Year Data retention (Typ)
  • Moisture Sensitivity Level: MSL3
  • Package 48-pin TSOP (12 * 20mm) All Packages are RoHS Compliant and Halogen-free