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TI SN74AVC16T245DGVRRoHS

Manufacturer
MPN
SN74AVC16T245DGVR
LCSC Part #
C20147
Packaging
TVSOP-48
Customer #
Key Attributes
16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
Datasheetpdf iconTI SN74AVC16T245DGVR
In-Stock: 467
467 In stock, ships now
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QtyUnit PriceTotal Amount
1+$ 2.4559$ 2.46
10+$ 2.0748$ 20.75
30+$ 1.8354$ 55.06
100+$ 1.5015$ 150.15
500+$ 1.3908$ 695.40
1,000+$ 1.3436$ 1343.60
Standard Packaging2500/Full Reel
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Products Specifications

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TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Buffers, Drivers, Receivers, Transceivers
ManufacturerTI
PackagingTVSOP-48
Input type-
Voltage - Supply1.2V~3.6V
Output TypeTri-State
Current - Output High(IOH)12mA
Series74AVC
Operating Temperature-40℃~+85℃
Current - Output Low(IOL)12mA
Number of Bits per Element8
Channel TypeBidirectional
FeaturesLevel shifting;Power-off isolation;Output enable
Number of Elements2
Propagation Delay-
Quiescent Current45uA

Additional Information

TypeDetails
Minimum1
Multiple1
Standard Packaging2500
Sales UnitPiece

Introduction

AI Translation

This 16-bit non-inverting bus transceiver operates from two independent configurable power supply rails. The SN74AVC16T245 is optimized for operation when VCCA and VCCB are set within the 1.4V to 3.6V range. The device operates with VCCA/VCCB as low as 2V. The A-port voltage tracks VCCA, which accepts any supply voltage from 1.2V to 3.6V. The B-port voltage tracks VCCB, which accepts any supply voltage from 1.2V to 3.6V. This enables universal low-voltage bidirectional translation between the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes. The SN74AVC16T245 is designed for asynchronous communication between data buses. Depending on the logic level at the direction control (DIR) input, the device transmits data from the A bus to the B bus, or from the B bus to the A bus. The output enable (OE) input can be used to disable the outputs, effectively isolating the buses. The SN74AVC16T245 control pins (1DIR, 2DIR, 1OE, and 2OE) are powered by VCCA. The device fully conforms to the specifications for partial power-down applications using Ioff. The Ioff circuitry disables the outputs to prevent damaging backflow current when the device is in power-down mode. The VCC isolation feature ensures that both ports are placed in a high-impedance state whenever any VCC input is at GND. To ensure a high-impedance state during power-up or power-down, OE should be connected to VCCA through a pullup resistor; the minimum value of this resistor is determined by the current-sinking capability of the driver.

Features

AI Translation
  • Control input level VIH/VCC referenced to VCCA voltage
  • VCC isolation feature — if either VCC input is tied to GND, both ports enter high-impedance state
  • Overvoltage-tolerant inputs and outputs for mixed-voltage data communication
  • Fully configurable dual-rail design supporting full supply voltage range of 1.2V to 3.6V on each port independently
  • Ioff supports partial power-down mode operation
  • I/O tolerates up to 4.6V
  • Maximum data rates:
    • 380Mbps (1.8V to 3.3V level translation)
    • 200Mbps (<1.8V to 3.3V level translation)
    • 200Mbps (level translation to 2.5V or 1.8V)
    • 150Mbps (level translation to 1.5V)
    • 100Mbps (level translation to 1.2V)
  • Latch-up performance exceeds 100mA per JESD78 Class II
  • ESD protection exceeds JESD22 specification requirements:
    • 8000V Human Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged Device Model (C101)

Applications

AI Translation
  • Consumer Electronics
  • Industrial
  • Enterprise
  • Telecom