ST STM32L4Q5VGY6TR

Ultra-low-power Arm® Cortex®-M4 32-bit MCU+FPU, 150 DMIPS, 1MB Flash, 320KB SRAM, LCD-TFT, AES+PKA

• Ultra-low-power with FlexPowerControl: supply voltage range 1.71V to 3.6V; operating temperature range -40℃ to 85/125℃; Batch Acquisition Mode (BAM); 150nA in VBAT mode (powering RTC and 32×32-bit backup registers); 22nA in Shutdown mode (5 wakeup pins); 42nA in Standby mode (5 wakeup pins); 190nA in Standby mode with RTC; 2.95μA in Stop 2 mode with RTC; 110μA/MHz in Run mode; 5μs wakeup time from Stop mode; BOR available in all modes except Shutdown
• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive Real-Time Accelerator (ART Accelerator) enabling zero-wait-state execution from Flash, up to 120MHz, MPU, 150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), DSP instructions
• Memory: 1MB Flash (2 banks for simultaneous read/write, proprietary code readout protection); 320KB SRAM (including 64KB with hardware parity); external memory interface (SRAM, PSRAM, NOR, NAND, and FRAM); 2× Octo-SPI memory interfaces
• GPIO: up to 136 fast I/Os, most 5V-tolerant, up to 14 I/Os independently supplied down to 1.08V
• Performance benchmark: 1.25 DMIPS/MHz (Dhrystone 2.1); 409.20 CoreMark® (0.41 CoreMark/MHz @120MHz)
• Energy benchmark: 285 ULPMark™ CP score
• Up to 24 capacitive sensing channels: touch keys, linear and rotary touch sensors
• Clock management: 4 to 48MHz crystal oscillator; 32kHz crystal oscillator for RTC (LSE); internal 16MHz factory-trimmed RC (±1%); internal low-power 32kHz RC (±5%); internal multispeed 100kHz to 48MHz oscillator (auto-calibrated by LSE, accuracy better than ±0.25%); internal 48MHz oscillator with clock recovery; 3× PLLs (system clock, USB, audio, ADC)
• 14-channel DMA controller
• 23 communication peripherals: USB OTG 2.0 full-speed (LPM and BCD support); 2× SAI; 4× I2C FM+ (1 Mbit/s, SMBus/PMBus support); 6× USART (ISO7816, LIN, IrDA, modem); 3× SPI (5× SPI including dual Octo-SPI); CAN (2.0B Active); 2× SDMMC; 8–14-bit camera interface (up to 32MHz B&W, up to 10MHz color); 8/16-bit parallel synchronous data I/O slave interface (PSSI)
• 11 analog peripherals (independently supplied): 2× 12-bit ADC (5 Msps, hardware oversampling up to 16-bit, 200μA/Msps); 2× 12-bit DAC (low-power sample-and-hold); 2× op-amps with built-in PGA; 2× ultra-low-power comparators; 2× sigma-delta modulator digital filters; 1× temperature sensor
• Advanced graphics: Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation; LCD-TFT controller
• 16 timers and watchdogs: 2× 16-bit advanced motor-control timers; 2× 32-bit general-purpose timers; 5× 16-bit general-purpose timers; 2× 16-bit basic timers; 2× low-power 16-bit timers (usable in Stop mode); 2× watchdogs; 1× SysTick timer; RTC with hardware calendar, alarms, and calibration
• Cryptographic acceleration: AES (128/256-bit key); Public Key Accelerator (PKA)
• True random number generator
• CRC calculation unit
• HASH (SHA-256) hardware accelerator
• Debug modes: Serial Wire Debug (SWD); JTAG; Embedded Trace Macrocell (ETM)
• 96-bit unique ID