TI TLV320ADC6140IRTWT

The TLV320ADC6140 is a high-performance audio analog-to-digital converter (ADC) that can support synchronous sampling of up to four analog channels or eight digital channels from pulse density modulation (PDM) microphone inputs. This device supports line and microphone inputs and allows single-ended and differential input configurations. It integrates programmable channel gain, digital volume control, programmable microphone bias voltage, phase-locked loop (PLL), programmable high-pass filter (HPF), biquad filter, low-latency filter mode, and can achieve a sampling rate of up to 768kHz. The device supports time-division multiplexing (TDM), I²S, or left-justified (LJ) audio formats and can be controlled via an I²C or SPI interface. These integrated high-performance features and the ability to operate from a single 3.3V or 1.8V power supply make this device an excellent choice for space-constrained audio systems in far-field microphone recording applications. The TLV320ADC6140 is rated for an operating temperature range of -40°C to +125°C and is available in a 24-pin WQFN package.

• Multi-channel high-performance ADC: 4-channel analog microphone or line input, 8-channel digital PDM microphone, or analog/digital microphone combination
• ADC line and microphone differential input performance: DR: 123dB with DRE enabled; 113dB with DRE disabled; THD+N: –98dB
• ADC channel summing mode DR performance: 116dB, DRE disabled, 2-channel sum; 119dB, DRE disabled, 4-channel sum
• ADC input voltage: differential 2V_RMS full-scale input, single-ended 1V_RMS full-scale input
• ADC sample rate (f_S) = 8kHz to 768kHz programmable channel settings: channel gain: 0dB to 42dB in 1dB steps; digital volume control: -100dB to 27dB; gain calibration resolution 0.1dB; phase calibration resolution 163ns
• Programmable microphone bias or supply voltage generation
• Low-latency signal processing filter selection, programmable HPF and biquad digital filters, AGC, I2C or SPI control
• Integrated high-performance audio PLL with automatic clock divider configuration
• Audio serial data interface: formats: TDM, I2S, or Left-Justified (LJ); word length: 16-bit, 20-bit, 24-bit, or 32-bit; master/slave interface
• Single-supply operation: 3.3V or 1.8V
• Power consumption at 1.8V AVDD supply: 8.5mW/channel (16kHz sample rate); 9.2mW/channel (48kHz sample rate)

• Microphone array systems
• Voice-activated digital assistants
• Teleconferencing systems
• Security and surveillance systems