LCSC Electronics logoLCSC Electronics svg logo
Sign In
USD
Cart
Nexperia 74AXP1T57GN115 product image
Images for reference only

Nexperia 74AXP1T57GN115RoHS

Manufacturer
Nexperia
MPN
74AXP1T57GN115
LCSC Part #
C17605731
Packaging
-
Customer #
Key Attributes
Schmitt trigger 1 Gates and Inverters - Multi-Function, Configurable RoHS
Datasheetpdf iconNexperia 74AXP1T57GN115
Out of Stock
Notify Me
Minimum: 1Multiple: 1Sales Unit: Piece
Add to BOM List
QtyUnit Price(Reference Only)Total Amount
1+$ 0.5302$ 0.53
200+$ 0.2121$ 42.42
500+$ 0.2045$ 102.25
1,497+$ 0.2015$ 301.65
Standard Packaging1497/Full Bag
Better price for more quantity?
$

Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Logic/Gates and Inverters - Multi-Function, Configurable
ManufacturerNexperia
Packaging-
output type-
Logic Family-
Input typeSchmitt trigger
Propagation Delay92ns@0.85V,5pF
Voltage - Supply-
Operating Temperature-40℃~+85℃
Output Logic Level - Low-
Input Logic Level - Low-
Input Logic Level - High-
Current - Output Low(IOL)-
Output Logic Level - High-
Quiescent Current(Iq)-
Current - Output High(IOH)-
FeaturesLocal shutdown mode
Number of Gates1
Report an ErrorShow similar products (0) >

Introduction

AI Translation

The 74AXP1T57 is a dual-supply configurable multifunction gate with Schmitt-trigger inputs. It features three inputs (A, B, and C), one output (Y), and dual supply pins (V_CCl and V_CCO). Inputs are referenced to V_CCl and outputs are referenced to V_CCO. All inputs can be connected directly to V_CCl or GND. V_CCl can be supplied at any voltage between 0.7 V and 2.75 V, and V_CCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature enables voltage level translation. The 74AXP1T57 can be configured for any of the following logic functions: AND, OR, NAND, NOR, XNOR, inverter, and buffer. The device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power-down applications using I_OFF. The I_OFF circuit disables the outputs to prevent potentially damaging backflow current through the device when it is powered down.

Features

AI Translation
  • Wide supply voltage range: V_CCI 0.7 V to 2.75 V, V_CCO 1.2 V to 5.5 V
  • Low input capacitance; C1 = 0.6 pF (typical)
  • Low output capacitance; CO = 1.8 pF (typical)
  • Low dynamic power consumption; CPD = 0.6 pF (typical) at V_CCI = 1.2 V
  • Low dynamic power consumption; CPD = 7.1 pF (typical) at V_CCO = 3.3 V
  • Low static power consumption; I_CCl = 0.5 μA (maximum at 85°C)
  • Low static power consumption; I_CCO = 1.8 μA (maximum at 85°C)
  • High noise immunity
  • JEDEC compliant: JESD8-12A.01 (1.1 V to 1.3 V; A, B, C inputs), JESD8-11A.01 (1.4 V to 1.6 V), JESD8-7A (1.65 V to 1.95 V), JESD8-5A.01 (2.3 V to 2.7 V), JESD8-C (2.7 V to 3.6 V; Y output), JESD12-6 (4.5 V to 5.5 V; Y output)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV, CDM JESD22-C101E exceeds 1000 V
  • Latch-up performance exceeds 100 mA (per JESD78D Class 2)
  • Inputs accept voltages up to 2.75 V
  • Low noise overshoot and undershoot < 10% of V_CCO
  • I_OFF circuitry supports partial power-down mode operation
  • Multiple package options
  • Operating temperature range: -40°C to +85°C