ISSI IS43TR82560DL-107MBL-TR
| Manufacturer | |
| MPN | IS43TR82560DL-107MBL-TR |
| LCSC Part # | C17234675 |
| Packaging | TWBGA-78(8x10.5) |
| Customer # | |
| Key Attributes | 1.283V~1.45V 2Gbit 933MHz DDR3L SDRAM TWBGA-78(8x10.5) Memory (ICs) RoHS |
| Datasheet |
Products Specifications
Show similar products (0) >| Type | Description | |
|---|---|---|
| Category | Integrated Circuits (ICs)/Memory/Memory (ICs) | |
| Manufacturer | ISSI | |
| Packaging | TWBGA-78(8x10.5) | |
| Voltage - Supply | 1.283V~1.45V | |
| Memory Size | 2Gbit | |
| Operating temperature | 0℃~+95℃ | |
| Clock Frequency | 933MHz | |
| Features | Auto self-refresh;Asynchronous reset function;Auto precharge function;Dynamic on-chip termination;Write leveling function;ZQ calibration function;Data mask function | |
| Memory Format | DDR3L SDRAM |
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Additional Information
| Type | Details |
|---|---|
| Minimum | 1 |
| Multiple | 1 |
| Standard Packaging | 2000 |
| Sales Unit | Piece |
| EDA Models | EasyEDA Model |
Introduction
AI Translation
This document describes the 256Mx8 and 128Mx16 2Gb DDR3 SDRAM, covering its features, configurations, packages, pin descriptions, and reset and initialization procedures. Regarding reset and initialization, it provides detailed coverage of the power-up initialization sequence, including voltage requirements when applying power, reset signal hold time, clock startup and stabilization requirements, as well as the device states and signal settings at various stages.
Features
AI Translation
- Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V
- Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V
- Backward compatible to 1.5V
- High speed data transfer rates with system frequency up to 1066 MHz
- 8 internal banks for concurrent operation
- 8n-Bit pre-fetch architecture
- Programmable CAS Latency
- Programmable Additive Latency: 0, CL - 1, CL - 2
- Programmable CAS WRITE latency (CWL) based on tCK
- Programmable Burst Length: 4 and 8
- Programmable Burst Sequence: Sequential or Interleave
- BL switch on the fly
- Auto Self Refresh(ASR)
- Self Refresh Temperature (SRT) Refresh Interval: 7.8 µs (8192 cycles/164 ms) TC = -40℃ to 85℃; 3.9 µs (8192 cycles/32 ms) TC = 85℃ to 105℃; 1.95 µs (8192 cycles/16 ms) TC = 105℃ to 115℃; 0.97 µs (8192 cycles/8 ms) TC = 115℃ to 125℃
- Partial Array Self Refresh
- Asynchronous RESET pin
- TDQS (Termination Data Strobe) supported (x8 only)
- OCD (Off-Chip Driver Impedance Adjustment)
- Dynamic ODT (On-Die Termination)
- Driver strength: RZQ/7, RZQ/6 (RZQ = 240 Ω)
- Write Leveling Up to 200 MHz in DLL off mode
- Operating temperature: Commercial (ΔTc = 0℃ to +95℃); Industrial (Tc = -40℃ to +95℃); Automotive, A1 (Tc = -40℃ to +95℃); Automotive, A2 (Tc = -40℃ to +105℃); Automotive, A25 (Tc = -40℃ to +115℃); Automotive, A3 (Tc = -40℃ to +125℃)
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| Qty | Unit Price(Reference Only) | Total Amount |
|---|---|---|
| 1+ | $ 12.2568 | $ 12.26 |
| 200+ | $ 4.8909 | $ 978.18 |
| 500+ | $ 4.7273 | $ 2363.65 |
| 1,000+ | $ 4.6471 | $ 4647.10 |
Standard Packaging2000/Full Reel | ||
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Compliance & Export Codes
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |
| Type | Details |
|---|---|
| RoHS | |
| ECCN | EAR99 |
| CNHTS | 8542329000 |
| USHTS | 8542320071 |
| TARIC | 8542329000 |
| Type | Details |
|---|---|
| CAHTS | 8542330000 |
| BRHTS | 85423299 |
| INHTS | 85423200 |
| MXHTS | 8542.32.99 |

