AMD/XILINX XC9572XL-7VQG44I
| Producent | |
| Nr części prod. | XC9572XL-7VQG44I |
| Nr LCSC | C1556247 |
| Opak. | VQFP-44(10x10) |
| Numer Klienta | |
| Klucz. cechy | VQFP-44(10x10) FPGAs (Field Programmable Gate Array) RoHS |
| Karta Katalogowa | AMD/XILINX XC9572XL-7VQG44I |
| Zgodność z RoHS | 1 dokumentów dostępnych |
Specyfikacje Produktu
Wszystko
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Producent | AMD/XILINX | |
| Opak. | VQFP-44(10x10) |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Producent | AMD/XILINX |
| Typ | Opis | |
|---|---|---|
| Opak. | VQFP-44(10x10) |
Pomoc i opiniePokaż podobne produkty (0) >
Opis
Tłumaczenie AI
The XC9572XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.
Funkcje
Tłumaczenie AI
- 5 ns pin-to-pin logic delays
- System frequency up to 178 MHz
- 72 macrocells with 1,600 usable gates
- Available in small footprint packages
- 44-pin PLCC (34 user I/O pins)
- 44-pin VQFP (34 user I/O pins)
- 48-pin CSP (38 user I/O pins)
- 64-pin VQFP (52 user I/O pins)
- 100-pin TQFP (72 user I/O pins)
- Pb-free available for all packages
- Optimized for high-performance 3.3V systems
- Low power operation
- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals
- 3.3V or 2.5V output capability
- Advanced 0.35 micron feature size CMOS
- Fast FLASH technology
- Advanced system features
- In-system programmable
- Superior pin-locking and routability with Fast CONNECT II switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with individual product-term allocation
- Local clock inversion with three global and one product-term clocks
- Individual output enable per output pin
- Input hysteresis on all user and boundary-scan pin inputs
- Bus-hold circuitry on all user pin inputs
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Fast concurrent programming
- Slew rate control on individual outputs
- Enhanced data security features
- Excellent quality and reliability
- Endurance exceeding 10,000 program/erase cycles
- 20 year data retention
- ESD protection exceeding 2,000V
- Pin-compatible with 5V-core XC9572 device in the 44-pin PLCC package and the 100-pin TQFP package
Na stanie: 3
3 W magazynie, wysyłka natychmiastowa
Minimum: 1Wielokrotność: 1Jednostka sprzedaży: Piece
Dodaj do Listy BOM
| Szt. | Cena jedn. | Suma całkowita |
|---|---|---|
| 1+ | $ 69.9241 | $ 69.92 |
| 30+ | $ 67.5401 | $ 2026.20 |
Standardowa Obudowa160/Full Tray | ||
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Specyfikacje Produktu
Wszystko
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Producent | AMD/XILINX | |
| Opak. | VQFP-44(10x10) |
| Typ | Opis | |
|---|---|---|
| Kategoria | Integrated Circuits (ICs)/Embedded/FPGAs (Field Programmable Gate Array) | |
| Producent | AMD/XILINX |
| Typ | Opis | |
|---|---|---|
| Opak. | VQFP-44(10x10) |
Pomoc i opiniePokaż podobne produkty (0) >
Opis
Tłumaczenie AI
The XC9572XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of four 54V18 Function Blocks, providing 1,600 usable gates with propagation delays of 5 ns.
Funkcje
Tłumaczenie AI
- 5 ns pin-to-pin logic delays
- System frequency up to 178 MHz
- 72 macrocells with 1,600 usable gates
- Available in small footprint packages
- 44-pin PLCC (34 user I/O pins)
- 44-pin VQFP (34 user I/O pins)
- 48-pin CSP (38 user I/O pins)
- 64-pin VQFP (52 user I/O pins)
- 100-pin TQFP (72 user I/O pins)
- Pb-free available for all packages
- Optimized for high-performance 3.3V systems
- Low power operation
- 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals
- 3.3V or 2.5V output capability
- Advanced 0.35 micron feature size CMOS
- Fast FLASH technology
- Advanced system features
- In-system programmable
- Superior pin-locking and routability with Fast CONNECT II switch matrix
- Extra wide 54-input Function Blocks
- Up to 90 product-terms per macrocell with individual product-term allocation
- Local clock inversion with three global and one product-term clocks
- Individual output enable per output pin
- Input hysteresis on all user and boundary-scan pin inputs
- Bus-hold circuitry on all user pin inputs
- Full IEEE Standard 1149.1 boundary-scan (JTAG)
- Fast concurrent programming
- Slew rate control on individual outputs
- Enhanced data security features
- Excellent quality and reliability
- Endurance exceeding 10,000 program/erase cycles
- 20 year data retention
- ESD protection exceeding 2,000V
- Pin-compatible with 5V-core XC9572 device in the 44-pin PLCC package and the 100-pin TQFP package
Zgodność & Kody Eksportowe
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Typ | Szczegóły |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542319090 |
| USHTS | |
| TARIC |
| Typ | Szczegóły |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |

