TI AM5726BABCXEA

AM572x Sitara processors are Arm application processors designed to meet the intensive processing requirements of modern embedded products.

The AM572x devices can achieve high processing performance through their highly flexible fully integrated hybrid processor solutions. In addition, these devices not only have programmable video processing capabilities but also incorporate a highly integrated peripheral set. Each AM572x device has encryption acceleration capabilities.

The dual-core Arm Cortex-A15 RISC CPU, along with two TI C66x VLIW floating-point DSP cores and the Vision AccelerationPac (with 4 EVE), provides programmability. With Arm, developers can separate control functions from other algorithms programmed on the DSP and coprocessors, thereby reducing the complexity of system software.

In addition, TI provides a complete set of development tools for Arm and C66x DSP, including a C language compiler, a DSP assembly optimizer for simplified programming and scheduling, a debugging interface for viewing source code execution, etc.

• Dual-core Arm Cortex-A15 microprocessor subsystem
• Up to 2 C66x floating-point VLIW DSPs – Object code fully compatible with C67x and Gfx+ – Up to 32 16×16-bit fixed-point multiplications per cycle
• Up to 2.5MB on-chip L3 RAM
• Two DDR3/DDR3L memory interface (EMIF) modules – Support up to DDR3-1066 – Up to 2GB per EMIF
• 2 dual-core Arm Cortex-M4 coprocessors (IPU1 and IPU2)
• Up to four Embedded Vision Engines (EVE)
• IVA-HD subsystem – 4K @ 15fps encode and decode support for H.264 codec – Other codecs up to 1080p60
• Display subsystem – Full HD video (1920×1080p, 60fps) – Multiple video inputs and outputs – 2D and 3D graphics – Display controller with DMA engine and up to 3 pipelines – HDMI encoder: compatible with HDMI 1.4a and DVI 1.0
• 2 dual-core Programmable Real-Time Unit and Industrial Communication Subsystems (PRU-ICSS)
• 2D graphics accelerator (BB2D) subsystem – Vivante GC320 core
• Video Processing Engine (VPE)
• Dual-core PowerVR SGX544 3D GPU
• Cryptographic hardware accelerators – AES, SHA, RNG, DES, and 3DES
• Three Video Input Port (VIP) modules
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA) controller
• 2-port Gigabit Ethernet (GMAC)
• Sixteen 32-bit general-purpose timers
• 32-bit MPU watchdog timer
• Five I2C ports
• HDQ/1-Wire interface
• 10 configurable UART/IrDA/CIR modules
• 4 McSPI modules
• Quad-channel SPI interface (QSPI)
• SATA Gen 2 interface
• 8 McASP modules
• SuperSpeed USB 3.0 dual-role device
• High-Speed USB 2.0 dual-role device
• Four MMC/SD/SDIO interfaces
• PCIe 3.0 subsystem with two 5Gbps lanes – One dual-lane Gen 2-compatible port – Or two single-lane Gen 2-compatible ports
• Dual Controller Area Network (DCAN) modules – CAN 2.0B protocol
• Up to 247 GPIO pins
• Power, Reset, and Clock Management (PRCM)
• On-chip debug with CTool technology support
• 28nm CMOS technology
• 23mm × 23mm, 0.8mm pitch, 760-pin BGA (ABC)

• Industrial communication
• Human-Machine Interface (HMI)
• Automation & control
• High-performance application analysis
• Other general-purpose applications