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MaxLinear XRT73L02MIV-F product image
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MaxLinear XRT73L02MIV-FRoHS

Manufacturer
MPN
XRT73L02MIV-F
LCSC Part #
C1549057
Packaging
TQFP-100(14x14)
Customer #
Key Attributes
TQFP-100(14x14) Telecom RoHS
Datasheetpdf iconMaxLinear XRT73L02MIV-F
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1+$ 19.9829$ 19.98
180+$ 7.7341$ 1392.14
540+$ 7.4627$ 4029.86
990+$ 7.3279$ 7254.62
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Interface/Telecom
ManufacturerMaxLinear
PackagingTQFP-100(14x14)
FeaturesClock and data recovery;Jitter cleaning;Adaptive receive equalization;Built-in phase-locked loop;Multi-channel integration

Introduction

AI Translation

The XRT73L02M is a two-channel fully integrated Line Interface Unit (LIU) for E3/DS3/STS-1 applications. It incorporates independent Receivers, Transmitters in a single 100 pin TQFP package. The XRT73L02M can be configured to operate in either E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz) modes. The transmitter can be turned off or tri-stated for redundancy support and for conserving power. The XRT73L02M’s differential receiver provides high noise interference margin and is able to receive the data over 1000 feet of cable or with up to 12 dB of cable attenuation. The XRT73L02M provides both Serial Microprocessor Interface as well as Hardware mode for programming and control. The XRT73L02M supports local, remote and digital loop-backs. The XRT73L02M also contains an onboard Pseudo Random Binary Sequence (PRBS) generator and detector with the ability to insert and detect single bit error.

Features

AI Translation
  • Provides low jitter clock outputs for either DS3, E3 or STS-1 rates.
  • On-chip clock synthesizer provides the appropriate rate clock from a single 12.288 MHz Clock.
  • Provides low jitter output clock.
  • Compliant with Bellcore GR-499, GR-253 and ANSI T1.102 Specification for transmit pulse
  • Tri-state Transmit output capability for redundancy applications
  • Transmitter can be turned on or off.
  • On chip Clock and Data Recovery circuit for high input jitter tolerance.
  • Meets the jitter tolerance requirements as specified in ITU-T G.823_1993 for E3 and Telcordia GR-499-CORE for DS3 applications.
  • Detects and Clears LOS as per G.775.
  • Receiver Monitor mode handles up to 20 dB flat loss with 6 dB cable attenuation.
  • On chip B3ZS/HDB3 encoder and decoder that can either be enabled or disabled.
  • On-chip clock synthesizer generates the appropriate rate clock from a single frequency XTAL.
  • 5 wire Serial Microprocessor Interface for control and configuration.
  • Supports optional internal Transmit Driver Monitoring.
  • PRBS error counter register to accumulate errors.
  • Hardware Mode for control and configuration.
  • Supports Local, Remote and Digital Loop-backs.
  • Single 3.3 V ± 5% power supply.
  • 5 V Tolerant I/O.
  • Available in 100 pin TQFP.
  • -40°C to 85°C Industrial Temperature Range.

Applications

AI Translation
  • E3/DS3 Access Equipment.
  • STS1-SPE to DS3 Mapper.
  • DSLAMs.
  • Digital Cross Connect Systems.
  • CSU/DSU Equipment.
  • Routers.
  • Fiber Optic Terminals.